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Improved Measurement Accuracy for Junction-to-Case Thermal Resistance of GaN HEMT Packages by Gate-to-Gate Electrical Resistance and Stacking Thermal Interface Materials

Top view of package
Fig. 1. Top view of a completed eGaN package.
  Application of gallium nitride high-electron mobility transistors (GaN HEMTs) in power con-verters has the potential to further increase the efficiency and power density because of their low conduction loss, low switching loss, and high temperature capability. However, packaging these fast-switching devices is challenging because of the requirement for low parasitics and low junction-to-case thermal resistance, RthJC. One of the first steps in developing a device or module package is to layout the package structure and select materials, followed by running electrical and thermal simulations to determine package parasitics and thermal resistances. Experimental verification of the electrical and thermal simulations is key to ensure the success of a package development. Of the two, thermal measurements are more difficult and generally less accurate. And, this is especially so for GaN packages, hampering the development of GaN packaging. A main challenge of measuring RthJC of a GaN package is the lack of accurate temperature sensitive electrical parameters (TSEPs) to determine the device’s junction temperature.
  However, the common TSEPs of a GaN HEMT lack sufficient sensitivity or stability due to charge trapping effect from device switching action. Recently, researchers fabricated GaN HEMT devices with two gate pads. They showed that the gate end-to-end or gate-to-gate electrical re-sistance, Rg2g, can be used as a reliable TSEP. However, because they did not fabricate pack-ages for their devices, they did not apply the technique to measure RthJC.
  In this work, we packaged a commercial (650 V, 150 A) eGaN device with two gate pads for the purpose of accurately measuring RthJC of the GaN package in Fig. 1. Two techniques were combined to improve the accuracy: (1) using Rg2g as the TSEP and (2) making multiple thermal re-sistance measurements with stacked layers of a thermal interface material (TIM). The stacked-TIM technique was employed to reduce inaccuracy in determining the package case temperature. The measurement procedure was tested using two different types of TIM on a custom package of an eGaN (650 V, 150 A) HEMT. In Fig. 2, the two measured RthJC were found within 24% of each other.
Measured and simulated thermal resistance
Fig. 2. Plots of the measured (red and blue circles) and simulated (red and blue crosses) junction-to-TIM thermal resistances with each TIM type. The dash lines are the fitted curves. The intercepts of the fitting curves on the y-axis are the experimentally determined RthJC.

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