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RESEARCH

Technology Areas

POWER CONVERSION TOPOLOGIES & ARCHITECTURES

Two images of new-generation microprocessors


Power processing systems have fundamentally transformed in recent years, from centralized power to distributed power.

For example, new-generation microprocessors operate at less than 1 V, higher than 100 A, and run at multi-GHz clock rates for maximum speed-power performance. These operating parameters create very fast dynamic loads that demand high current slew rates during transients and have forced a move from the traditional, centralized power supply architecture to a distributed power system (DPS). A dedicated point-of-load converter is placed in each output unit close to the high-speed processor, while the front-end power processing that interfaces with utility lines is performed at a system level.

This kind of DPS approach has not only enhanced system performance and improved the design and manufacturing process, but also has opened the opportunity to develop a standardized modular approach to power processing.

CPES has been at the forefront of this research, and has developed a number of innovative power conversion technologies based on the modular building block concept. CPES research in this area includes power system architecture, system interface stability and requirements, electromagnetic interference / electromagnetic compatibility at the system level, lter design, single-phase power factor correction circuits, three-phase power factor correction circuits, high-frequency dc-dc PWM converters, as well as resonant converters, and integrated single- phase and three-phase PFC/dc-dc converters.

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