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1.2 kV SiC MOSFET Full-Bridge Power Module with Integrated Gate Driver and Coupled Inductor
Year: 2023 | Author: Jack Knoll | Paper: H1.8
Fig.1. Trimetric view of the IMBB prototype.
Static characterization performed on the IMBB after the full packaging procedure was completed indicates that all four dies in the full-bridge are functional. The IMBB has Ansys-Q3D-Extractor simulated power-loop and gate-loop inductances of 4.5 nH and 1.6 nH, respectively. Double-pulse tests (DPTs) were performed on the low-side and high-side MOSFETs of the IMBB. The resultant turn-off transient waveforms of the low-side MOSFET are seen in Fig. 2. During the DPTs, the low parasitic inductances of the IMBB allowed the bottom switch to achieve turn-off and turn-on dv/dts of 74 V/ns and 80 V/ns, respectively, with a 4% voltage overshoot. Silver-sintered MOSFET drains and the DBC substrate allow for measured junction-to-case and junction-to-ambient thermal resistances of 0.65 K/W and 1.18 K/W, respectively.
