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Packaging of a 15-kV SiC MOSFET With Insulation Enhanced by a Nonlinear Resistive Polymer-Nanoparticle Coating
Year: 2023 | Author: Zichen Zhang | Paper: T2.5
Fig. 1. A photo of one fabricated 15kV SiC MOSFET single-die package without lid.
In this work, the packaging of a 15 kV silicon-carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) was developed with the help of a nonlinear resistive polymer-nanoparticle coating applied along the copper edges of the package's direct-bond copper (DBC) substrates. Without the coating, the substrate -- a 1.0 mm alumina DBC substrate encapsulated in a silicone gel -- had an average partial discharge inception voltage of around 9.7 kV, 35% below the device's rated blocking voltage. With the coating, the partial discharge inception voltage was increased to 21.5 kV, a 120.5% improvement over that without the coating. Discrete 15 kV SiC MOSFET packages were fabricated on the coated substrates, as shown in Fig. 1, and their static electrical performances were characterized, as shown in Fig .2.
Fig. 2. Three consecutive measurements of the package's blocking capability.
