# Small-Signal Analysis and Optimal Design of Constant Frequency V^{2} Control

^{2}control has been widely applied in point-of-load buck converters. In contrast with the traditional voltage or current mode, V

^{2}control has the following three features: 1) no current-sensing network is required; 2) fast load transient characteristics with direct output voltage feedback; and 3) the outer-loop compensator is much simpler. In this paper, an optimal design strategy is proposed after a thorough investigation of the small-signal model for constant frequency V

^{2}control. The physical causation of two pairs of double poles is identified and an explicit stability criterion is presented. For the first time, it is found that different design strategies should be used with different capacitors. For OSCON capacitors, designing an external ramp is adequate, while for ceramic capacitors an additional current ramp is required to control the stability margin. This work mainly focuses on the constant frequency V

^{2}control, as shown in Fig.1.

First the case with no external ramp is considered, and the analysis shows that there are two kinds of sidebands that can be decoupled; inductor current sidebands cause one pair of double poles, and capacitor voltage sidebands cause another pair of double poles. To avoid the coupling and interacting of these sidebands, two factors should be considered; the duty ratio (D) and the current feedback strength (). For different types of capacitors there are different stable regions that can be considered based on switching frequency, as shown in Fig. 2. With the addition of an external ramp, it was found that for the OSCON capacitor, the stability region can be extended to cover the whole duty cycle region with the appropriate selection of external ramp, as shown in Fig. 3.

For ceramic capacitors, the external ramp is not sufficient for stable operation. Therefore, a hybrid ramp strategy is proposed for the optimum design purposes; a current ramp is used to enhance the current strength feedback to minimize the effect of the capacitor voltage feedback loop, while an external ramp is used to reduce the sample and hold effect for the inductor current feedback loop. Either inductor current or capacitor current can be used to enhance current feedback strength for the ceramic capacitor case. As shown in Fig. 4, a well-damped system can be achieved with a hybrid ramp.

The proposed hybrid ramp method was experimentally verified for the ceramic capacitor case, as shown in Fig. 5, where the analytical model agrees with the experimental results.