High Resolution DPWM Schemes (Part I) (2005)
Due to the great progress made in the area of very-large-scale integration (VLSI), it is possible to broaden the application areas of digital control, especially in power electronics. However, one of major challenges in digital control is quantization effects. In the digital-controlled power converters, digital pulse-width modular (DPWM) and analog to digital (A/D) converter are two major quantizers. The duty cycle exported by DPWM can only have discrete values, and the resolution of the discrete duty cycle ultimately determines the resolution of the output voltage. If there is no desired output voltage value inside the zero-error bin of the A/D converter, limit cycle oscillations will happen. High resolution DPWM can greatly reduce the limit cycle oscillations. Therefore, high-frequency, high-resolution DPWM design with reasonable power consumption and die size becomes the major challenges in the implementation of digital-controlled power converters.
CPES proposed several high resolution DPWM schemes. The proposed constant on-time modulation schemes can achieve eight times finer resolution than the conventional DPWM in the VR application, which can greatly reduce the design difficulty of the DPWM.