New Digital Control Architecture (2006)
Recently, digital power supplies are becoming more and more popular in the power electronics field. Power supplies with digital control can overcome many drawbacks of those with analog control and provide more functions easily to improve the whole system performance, such as noise immunity, re-programmability, communication and so on. In spite of these benefits, one of major challenges is the quantization effects inherent in the digital control loop. Conventional voltage-mode digital control structure is widely used in the industry products, and a very high resolution digital pulse modulator (DWPM) is necessary to avoid unpredictable limit cycle oscillations in the conventional structure. However, high resolution DPWM is hard to achieve and greatly increases the cost of digital controller. Previously, CPES proposed several modulation methods, e.g. constant on-time modulation and nearly constant frequency modulation, which can improve the resolution of the DPWM about ten times comparing with convention DPWM methods. Although cost reduction can be achieved through proposed modulation methods, the fundamental issue still exists: unpredictable limit cycle may happen and high resolution DPWM is necessary in the conventional digital control structure. In order to solve this issue, CPES has proposed a new digital control architecture eliminating the need for high resolution DPWM. In this new architecture, a digital ramp is added to help improve the resolution and limit the oscillation. Thus, significant cost reduction can be achieved by the proposed structure.