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Asymmetrical Interleaving Strategy for Multi-Channel PFC (2006)

Year: 2006
The continuously increasing efficiency and power density requirement of the AC-DC front-end converter posed a big challenge for today's power factor correction (PFC) circuit design. The multi-channel interleaved PFC can effectively reduce the input ripple current due to the ripple cancellation effect. It is generally believed that the reduced input ripple current will lower down the DM EMI noise magnitude, which will make the DM filter smaller. However, how the interleaving technique will impact the EMI filter design has not been fully investigated. Actually, for most of today's PFC, running in the frequency range of 75 kHz ~ 150 kHz, the conventional 2-channel interleaving technique cannot help to reduce the EMI filter size at all. In CPES, the multi-channel interleaving impact on the EMI filter design is fully investigated. By properly choosing the interleaving channel number and the switching frequency, the EMI filter size and cost can be effectively reduced. Further more; by applying the proposed multi-channel PFC with asymmetrical interleaving strategy the maximum size reduction on the EMI filter can be achieved at all switching frequency range with all different channel numbers. This study is very useful for design high efficiency high power density AC-DC front-end converters.


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