Boost PFC Noise Model and its Applications in Balance PFC
Power factor correction (PFC) converters are located in the front of the power electronics system. EMI noise is generated and directly propagated to the power lines. It is found that most of the measured EMI on LISNs is from PFC. The parasitic capacitance existing between the high dv/dt nodes and the ground contributes to CM noise. Investigating the noise model of PFC so as to figure out methods to reduce CM noise is a very meaningful work to do. CPES has developed noise model for power converters using network theory. For PFC, important main switches can be replaced by voltage sources and current sources which have the exact same time domain waveforms as the replaced one. The superposition theory can therefore be utilized to analyze the effects of different noise sources. By exploring the noise model, a general balance concept is proposed to cancel the CM noise. The balance concept uses the Wheatstone bridge to balance the CM noise so that it would not flow to the power lines. By simply splitting boost inductor to two windings and adjust the turn ratio, the impedance ratios of the two pair legs in the Wheatstone bridge are equal so that CM noise can be balanced and minimized.