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Cancellation of CM Parasitic Capacitance for CM Noise Reduction

CM noise in power electronics is due to the parasitic capacitance between high dv/dt nodes and the ground. If this capacitance can be eliminated, the CM noise can be greatly reduced. CPES has proposed CM parasitic capacitance cancellation techniques to cancel the CM capacitance between the high dv/dt nodes and the ground. The high dv/dt nodes in power electronics systems are usually connected to the main switches. And the main switches are usually connected to inductors. This technique utilizes one winding on the inductor and one small capacitor to generate a negative capacitance in parallel with the CM parasitic capacitance between the high dv/dt nodes and the ground. The negative capacitance has the same capacitance value as the parasitic capacitance, so the net effects are cancellation. Because the parasitic capacitance is canceled, the CM noise is greatly reduced at low frequencies. EMI filter size can also be greatly reduced and the system power density of the system is thus increased.

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