RESEARCH
High Temperature Planar High Density Power Module
Year: 2008
Fig. 1. Power module layout design and packaging.
As shown in Fig.1, in the cross-section structures of the planar packaging, the SiC diode is sandwiched between DBC and the nano-silver paste connected copper leads. Copper leads are used as both the external lead and the internal interconnect to the semiconductor die enclosed in the power module. Nano-silver paste is used as the electrically conductive connecting material. Epo-tek 600 and spacer act as the insulation layer between the electrical conduction layers. Based on the SiC planar packaging, materials for each part of the module are compared and selected to ensure the full package can function reliably at 250°C. The promising results of thermal cycling test on die-attachment and planar package assemblies prove that the proposed package can perform well for large temperature excursion. The multi-chip phase-leg power module following the layout design was fabricated, as shown in Fig.1. This prototype power module was operated with 400 V input voltage, 5A input current at the estimated junction temperature of 250°C. The switching waveforms of top JFET gate signal, bottom JFET gate signal, top JFET drain to source voltage and inductor current are shown in Fig.2. The continuous power test lasted 20 minutes after the system was running in the steady state. The test results prove that the designed planar package can support the SiC multi-chip power module operating at 250°C junction temperature.
By taking advantage of the CPES high temperature planar packaging, SiC devices are well suited for operation in harsh temperature environments like aerospace and automotive applications.
Fig. 2. Electrical evaluation.
