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Design, Characteristics, and Application of Pluggable Low-Inductance Switching Power Cell of Paralleled GaN HEMTs

Year: 2018 | Author: Bingyao Sun | Paper: T1.1
Image of switching cell design of two GaN HEMTs paralleled.
Fig. 1. Top (upper) and back (lower) side of the switching cell design of two GaN HEMTs paralleled.
Gallium-nitride (GaN) devices are emerging as a possible replacement for silicon devices, due to their distinct advantages in terms of small on-resistance, small output capacitor, and lack of reverse recovery loss. However, one challenge in utilizing GaN devices is in determining how to parallel them to increase the current capacity and reduce system conduction loss. One known issue in using GaN devices is that the parasitics in the gate loop may damage the gate with a larger oscillation, which becomes severe when the devices are paralleling. The key to parallel switching devices is to have a symmetrical layout for all switches, including the gate loop and power loop. Additionally, a larger gate resistor may help to attenuate the gate oscillation, but this also limits the switching speed.

This paper proposes solutions for paralleling two or four GaN high-electron-mobility transistors (HEMTs) with a 1 Ω gate resistor. The gate loop inductances of the paralleled devices are minimized to 2.4 nH with 0.1 nH difference. The power loop inductance is also minimized to 3 nH with a footprint of 65.5 mm × 33 mm. Based on the proposed design shown in Fig. 1, the double-pulse test is performed with 400 Vdc, 100 A load current with 1 Ω gate resistance. The small gate resistance enables very fast turn-on and turn-off speeds with minor oscillation on the gates, as shown in Fig. 2. Furthermore, an adaptive thermal solution is proposed, which offers a customized heat sink to control the air flow and fully utilize the space. The commutation between the two paralleled devices during turn-on, where a very large gate oscillation occurs, is explained based on the experimental waveforms. It is found that the combination of gate resistor values has a significant impact on gate oscillation when two devices are paralleling. The switching losses with different turn-on and turn-off gate resistors are measured and compared. Finally, the designed switching cells are tested in a 400 V input voltage, 10 kW output power LLC resonant converter switching with up to 450 kHz switching frequency. This example illustrates how the switching cell can be utilized to build a high efficiency (98 percent) and high power density (131 W/in3) converter for battery charger applications.

Image of double pulse test waveforms.
Fig. 2. Double pulse test waveforms with Vdc= 400 V, Ids = 100 A, Rg = 1 Ω: upper: turn-on, lower: turn-off.

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