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EDUCATION

Power Electronics Packaging

Instructors: Christina DiMarino
Dates: June 23rd - 27th
Lectures: Virginia Tech Research Center, Arlington (VTRCA)
Lab: 900 N Glebe Rd, Arlington, VA 22203

Course Description

Power electronics packaging is advancing to meet rising demand in sectors like consumer electronics, electric transportation, data centers, and renewable energy. This course covers fundamental packaging concepts, cross-disciplinary principles, and finite element analysis (FEA) simulation.

Participants will learn theory and the latest research on electrical, thermal, materials, and reliability challenges, gaining insights into trade-offs and cutting-edge solutions. Topics covered include: die attach, interconnects, electrical and thermal characterization, encapsulation and high-voltage characterization, and thermal and power cycling.

Engineers will be prepared to design effective packages for modern power electronics systems through hands-on experiments conducted in CPES’ world-class Packaging Laboratory. Participants will use ANSYS Electronics Desktop and ANSYS Workbench as well as the following instruments:

  • Wire bonder
  • Solder reflow
  • Programmable hot plate
  • Hot press
  • Vacuum oven
  • Etcher
  • Laser
  • Curve tracer
  • Probe station
  • Die bond tester (shear and pull)
  • Thermal analyzer

The Short Course Topics

  • Die Attach
  • Interconnects
  • Electrical and Thermal Characterization
  • Encapsulation and High-Voltage Characterization
  • Thermal and Power Cycling

Additional Information

Agenda
Lodging (TBD)

Travel to VTRCA

Contact

For any questions or registration instructions, please contact Nina Jaworski.


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