Experimental Verification of a Converter Having Integrated Capacitor Blocked Transistor Cells Using 10 kV SiC MOSFETs
A medium-voltage modular converter was built to verify the ICBT operation, as shown in Fig. 1. There are 12 power cells in total. Three cells are connected in series vertically to form a converter arm, and two arms form a phase leg. Theconverter has two phase legs sharing the same converter dc bus, which sits on the top. The cells are rated at 6 kV and feature a 10 kV SiC MOSFETs. The cell capacitance is 32.5 µF. A high-voltage, low-current power supply connects to the converter dc bus; an inductor is connected between the outputs of the two phase legs. The rated load current flows through the load inductor, while the power supply only supplies the losses of the converter.
To ensure the cell capacitor voltage balance, a capacitor voltage control is proposed and implemented. The voltage difference is changed by applying delays to the gate signals of some of the cells, depending on the measured cell capacitor voltages and phase leg output current polarity.
Fig. 2 shows the experimental results at 12 kV dc bus voltage and 25 Arms output current. Three subfigures show the three cell capacitor voltages: in the upper arm of phase leg A, the three cell capacitor voltages in the lower arm of phase leg A, and the output current of phase leg A. Each cell capacitor voltage is around 4.0 kV, one-third of the dc bus voltage. The maximum peak-to-peak voltage ripple in a cell is around 34 V, which is 0.85 % of the rated voltage, verifying the low cell capacitor voltage ripple feature of the ICBT operation. The maximum instant voltage difference in an arm is around 28 V, which is 0.70 % of the rated voltage, verifying the effectiveness of the balancing control.