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Insulation Design and Assessment of a Medium Voltage PEBB-based Converter

Year: 2022 | Author: Joshua Stewart | Paper: H-S5.3
Hardware prototye and expriment
Fig. 1. Insulation test of 24 kV bus with capacitor daughtercards. Flashover >27 kV
  Interconnect of a Multiphase PEBB-based Converter
Medium voltage &lbar;MV&rbar; SiC MOSFETs, such as Wolfspeed’s 10 kV SiC MOSFET module, offer the ability to build megawatt level power electronics building blocks &lbar;PEBBs&rbar;. A 24 kV PCB-bus motherboard was designed to serve as a low impedance interconnect between two phase legs of a 24 kV 2 MW PEBB-based converter. In order to achieve a partial discharge inception voltage &lbar;PDIV&rbar; >24 kV, internal copper layers were staggered with an offset to introduce a field grading that reduces the peak E-field intensity between layers. As the electric strength of FR4 is higher than the surrounding air, it is desirable to contain the highest fields inside of the PCB. In this work, “shield pads” are introduced to further reduce the peak E-field intensity in air. Shield pads are pads within the PCB dielectric that are the same shape, but slightly oversized, and connected to the same potential as pads directly above them on the surface of the PCB.

  Custom 9 μF 3 kV capacitor daughtercards with integrated balancing resistors were designed using a series-parallel network of Commercial off-the-Shelf (COTS) film capacitors. These daughtercards mount directly to the motherboard to build a 1.13 μF 24 kV capacitor bank.

  The motherboard PDIV was tested on a layer-to-layer basis and as a full assembly to ensure the system is PD free under 24 kV operation. Fig 1 shows the motherboard with daughtercards mounted. Here, the air insulation between the motherboard and daughtercards are tested by observing both PDIV and flashover voltage. Fig 2. Is the full bus assembly including the container system and frame used to attach it to the converter.

  This work demonstrates a 24 kV DC bus motherboard with 3 kV capacitor daughtercards serving as the low impedance interconnect of a 2 MW PEBB-based multiphase converter. The full paper details the design and analysis of the DC bus with shield pads, capacitor daughtercards, and the front end of the bus container which used to connect the external MVDC supply.
Dual bus assembly
Fig. 2. Dual bus assembly configured for 2-phase converter
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