Fig. 1. Single-phase totem-pole PFC with current and voltage control
Small-signal stability analysis in a balanced three-phase system can be performed by extracting source and load impedance in a synchronous rotating frame (d-q) and using Generalized Nyquist Criterion (GNC). For a single-phase system or three-phase unbalance systems, like a data center power system, the derivation of input impedance and stability analysis in the d-q frame is not straightforward because of the systems inherent time-variant condition due to the single-phase and unbalanced load. Existing approaches to analyze the stability of such a system are based on harmonics linearization in the stationary frame or by creating virtual frames and transforming the constructed three-phase system to another rotating frame. Inspired by the latter method, this paper models and characterizes the input impedance of a single-phase totem-pole power-factor-correction (PFC) converter in d-q frame based on virtual frames method, which is a vital step towards stability analysis of data power systems. This paper also analyzes the different control loops impact on the shaping of the PFC d-q impedance, which can provide insights for design-oriented stability analysis. The derived impedance model is verified with experimental measurement.
This paper studies a totem-pole topology PFC, the circuit of which is shown in Fig. 1. Its controller contains a proportional-resonant (PR) based current controller, a proportional-integral (PI) based dc voltage controller, and a phase tracking unit by scaling the input voltage by a gain of 1/|>Vac
|, and an ac voltage feedforward control.
Fig. 2 shows the measured impedance and the modeling results in the d-q frame in 1Hz~1kHz. The modeling results match well with the experimental results except for around 120Hz given the presence of the dc-bus double line-frequency ripples that induce the ac side third harmonics through frequency coupling, mixing the small-signal response and operating point response. The mismatch in Zdq
mainly results from the system error because the off-diagonal terms are too small. Another important point is that this mismatch is also not critical because the PFC converter impedance is diagonally dominant, and the off-diagonal terms have a negligible effect on the minor loop gain construction.