Fig. 1. Hybrid-structure packaging fabrication process.
We have developed a novel hybrid packaging structure for high-temperature SiC power modules that combines the benefits of both the wirebond structure and the planar structure. With the resulting hybrid structure, the power modules can achieve the same footprint and similar parasitics to regular planar structures, but with a much easier fabrication process and more reliable top-side interconnections. A three-phase multiple-chip prototype module has been built based on a SiC JFET, and tested with a 250 C junction temperature. Detailed comparisons conducted between the hybrid, planar, and wirebond structures reveal better performance of the hybrid structure with smaller parasitics than the wirebond structure, and easier fabrication, more reliable top-side connection, and more flexible die-attachment material selection than the planar structure.
Fig. 1 shows the fabrication process with a single SiC JFET. The processing time is two hours less than that of the planar structure. In addition, the planar packaging structure employs a three-step sintering process, and each process temperature be at least 40°C lower than the previous one to prevent it from melting. This makes it difficult to select the die-attachment materials. However, since there is only one sintering process in the hybrid packaging structure, more flexible die-attach material selection is possible. The fabricated power module is shown in Fig. 2. There are three input power lead frames (A, B, and C), two output power lead frames (P and N), and two gate-drive lead frames (G and S). The lead frames are fabricated separately with a DBC substrate.
Fig. 2. Multiple-chip power module.