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Driving and sensing design of an enhancement-mode-GaN phase-leg as a building block

Fig. 1. Layout of a full-bridge building block
A phase-leg or half-bridge can serve as the building block for many power conversion topologies. When the positive and negative nodes of the phase-leg are connected to a voltage source, the peak voltage of each switch is clamped to the source voltage. This configuration of voltage-fed phase-legs is preferable to GaN transistors. which have a lack of avalanche capability. Both the power loop and gate loop are self-contained inside the module, enabling minimized inductances, reliable switching, and low loss. But this building block, as Fig. 1 shows, is still incomplete without two peripheral circuits: floating drives to interface with the PWM generating board, and sensing circuits of the phase-leg voltages and currents for control and protection purposes. These two parts of the circuitry have to survive the highly noisy environment of GaN switching.

The key to designing the driving channel with high common-mode transient immunity (CMTI) is to provide a high impedance between the high-voltage/high-power side of the GaN MCM to the low-power side that comes from the control circuit. The power supply and the gate drive are selected with very small inter-capacitance, whose effect is illustrated in Fig. 2. A Y-capacitor filter is added to avoid noise flowing into DSP control board. Additionally, the PCB layout is considered. For example, to minimize the parasitic capacitance generated by the layout, the copper layers of the primary side and secondary side should be without overlap.

In order to achieve reliable sensing in the very noisy GaN switching environment, the DC voltage sensor requires a low-pass filter stage and needs to be placed outside the full-bridge board; the AC current sensor should not be separated from the switching node by a high-impedance component, such as an inductor, and therefore will also be outside the full-bridge board, while the DC current sensor can be left on the full-bridge board. Inverter tests are performed with 300V, 6A and 500kHz, with and without the techniques implemented; the sensing results are shown in Fig. 3. These clean sensing results are critical to the closed-loop control of the system.

Fig. 2. Waveforms (a) without and (b) with SIB610EC-B-IS digital isolator
Fig. 3. Sensing results (a) without and (b) with the techniques
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