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Digital-Based Interleaving Control for GaN-based MHz CRM Totem-Pole PFC
Year: 2016
Fig. 1. Circuit diagram of two-phase interleaved totem-pole PFC with cascode GaN devices.
The emerging wide-bad-gap (WBG) power semiconductor devices provide the enabling tech-nology to dramatically increase the efficiency and power density of switch-mode power supplies with potential lower cost and better manufacturability. Therefore, by using WBG devices to de-sign the 6.6kW OBC system, the target is to increase the switching frequency to higher than 300kHz with doubled or tripled power density, at least 95% efficiency, and bi-directional power flow capability.
In this research, four different system architectures are, first evaluated and compared. The best candidate is the proposed novel variable DC-link voltage system architecture. Then, the fo-cus of this paper will turn to the design of the AC/DC stage so that detailed design considera-tions are elaborated, including the evaluation of 1.2kV SiC MOSFETs for device selection; a programmed extra off-time function to realize a whole line cycle zero-voltage-switching (ZVS) and eliminate dominant turn-on loss; and a proposed universal control strategy for both rectifier mode and inverter mode operation. Finally, a prototype is demonstrated with 98.5% efficiency and 47W/in3 power density of the AC/DC stage and 96% efficiency and 24W/in3 power density of the total system.
Fig. 2. Experimental waveform of open-loop interleaving.
