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Trends in SiC MOSFET Parameters from Accelerated Lifetime Tests

Year: 2019 | Author: Joseph Kozak | Paper: P4.1
Experimental setup and waveforms
Fig. 1. Experimental test bed and experimental voltage and current waveforms
Integrating SiC power MOSFETs is very attractive for advancing power electronic systems, yet system reliability with new devices remains in question. This work presents a newer accelerated lifetime test (ALT) that further investigates the packaging and semiconductor failures of a TO-247 SiC MOSFET. This ALT, entitled Switching Cycling, utilizes the transient turn-on and turn-off of a device to stress the semiconductor under high drain-source voltage (VDS), and high pulsed drain-source current (IDS). The device is pulsed on to allow the device to fully turn on and reach the desired stress current. The short pulse time minimizes conduction losses, therefore minimizing self-heating effects. The clamped inductive circuit and initial VDS and IDS pulse waveforms are shown in Fig. 1. The objective of Switching Cycling is to observe the degradation of the semiconductor through repetitive switching events. In this way, the degradation caused by switching events can be identified. Initial experiments are conducted at the rated pulse-current rating, and at 90 percent of the breakdown voltage. Device characteristics are recorded every six hours to monitor the degradation of key precursor parameters. Main parameters include threshold voltage, on-resistance, and gate leakage current. Shifts in the threshold voltage and on-resistance can be seen in Fig. 2. Additional experiments at increased current ratings are also being investigated to further explore the degradation of devices under increased switching energy profiles.
Changes in parameters
Fig. 2. Changes in threshold voltage (left) and ON-resistance (right) from Switching Cycling.

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