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Design of 20 kW Full-SiC Three-level, Three-phase Uninterruptible Power Supply

Circuit schematics
Fig. 1. Prototype of full-SiC UPS.
An uninterruptible power supply (UPS) is an application in which low conduction loss and switching loss from silicon carbide (SiC) devices, can largely improve the system efficiency. UPSs are comprised of multiple power-conversion stages and an energy storage. Due to the superior loss characteristic of SiC devices, the efficiency of a single stage can be up to 99 %, which leads to 98 % double conversion efficiency. With high efficiency, the operation costs of a UPS can be reduced. Also, the increase in the switching frequency leads to higher power-density. In this paper, the design and implementation for a high efficiency 20 kW, 480 Vac, 800 Vdc full-SiC based UPS has beenis presented. Loss of commercial 2-level and 3-level modules are compared, based on the datasheet values. Based on the result, a 3-level neutral-point clamped (NPC) topology has beenwas selected, which showed higher efficiency for a high switching frequency range over 30 kHz, compared to a 2-level case. A gate driver has beenwas designed for the NPC module. A double-pulse test has beenwas conducted to extract switching-loss with a the designed gate driver. Maximum dv?dt is 26.4 V?ns, while di?dt is 4.14 A?ns when Rg equals to 0.05 Ω. Based on the experimental switching-loss data, the efficiency simulation has beenwas performed. Since the on-drop of the MOSFETs and neutral point clamping diodes is are highly dependent on the junction temperature, a lumped parameter thermal simulation has beenwas performed to estimate the temperature rise. With a given heatsink and fan design, the junction temperature of the rectifier-side heatsink reaches 65° C, while the inverter side reaches 81° C at switching frequency of 60 kHz. A An LCL filter has beenwas designed to meet a total harmonic distortion (THD) requirement, while the loss and power-density are optimized. A prototype full-SiC 3-level UPS was built and shown in Fig. 1. The size of the assembly is 280 mm x 254 mm x 178 mm. A thermal rise of heatsink is measured with a thermal camera when it reached the equilibrium. In the experiment, the highest temperature on the inverter-side heatsink is measured to be 71° C. The temperature of the LCL filter is measured, and with small core-loss of nanocrystalline, the temperature of the converter-side inductor is measured to be lower than 55° C. An efficiency curve was extracted from 30 % load to 100 % load and shown in Fig. 2. It is compared with the Si- insulated gate bipolar transistor (IGBT) solution and the silicon (Si) and SiC hybrid solution, which also are comprised of 3-level phase-legs and have similar power ratings. It can be seen that the full-SiC prototype could achieve 1 % increase in the double conver-sion efficiency at the full load.
Simulation results
Fig. 2. Efficiency comparison with Si-based or Si- and SiC hybrid three-level UPSs.