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Design and Assessment of a Medium-Voltage Power Cell based on High-Current, 10 kV SiC MOSFET Half-Bridge Modules

Year: 2020 | Author: Slavko Mocevic | Paper: P3.2
Power cell
Fig. 1. Photographs of the 10 kV SiC MOSFET-based half-bridge power cell (a) power cell with constitutive parts outside enclosure, (b) power cell enclosure. Power density: 11.9 kW/L (195 W/in3)
  Rapid technology improvement of SiC MOSFET transistors combined with their extraordinary characteristics are key driv- ers for their utilization in medium-voltage (MV) applications. For typical MV modular converter applications, the power cell is a critical piece. Power cell systematic design and assessment method- ology are crucial for preventing damage and for full testing that also explores capabilities prior to implementation at the converter level. Proven successful utilization of SiC MOSFET devices, together with their superior characteristics, are slowly overtaking power cell designs, currently dominated by Si IGBTs. Recent advances have been made in the design of power cells with 1.2 kV, 1.7 kV and 10 kV SiC MOSFETs.
  Accordingly, design considerations and available solutions for the design of a power cell utilizing high current, 10 kV, SiC MOSFETs in MV applications is presented. Furthermore, the systematic design and assessment framework process of the power cell is pro- vided. Critical insulation considerations and testing procedures are described, confirming partial-discharge-free (PD‐free) operation at the rated voltage of the power cell. Safe operating area (SOA) is derived for a single dc-dc case with a duty cycle of 50% for a designed cooling system. However, the described methodology would be the same for any case in dc-dc or dc-ac operation mode. The thermal model is 90% accurate, showing an acceptable maximum difference of 8° C, which is, considering the complexity of the system and its cooling, extremely valuable for proving thermal modeling methodology. Additionally, the designed enhanced gate-driver (eGD) successfully deals with electromagnetic interference (EMI) issues caused by having high slew rate voltage transients. The designed MV power cell (shown in Fig. 1) for utilization in modular multilevel (MMC) applications having the latest 10 kV SiC MOSFET half-bridge (HB) module achieved power density (PD) ≥ 10 kW/l, η ≥ 99% (shown in Fig. 2) and successfully operated at Vdc = 6 kV, I = 84 A, fsw ≥ 5 kHz, Tj ≤ 150° C in both both dc‐dc and dc‐ac mode, having high switching speeds up to dv/dt ≈ 100 V/ns.
Efficiency curve
Fig. 2. Comparison between estimated and measured power cell efficiency for variable current range, Vdc = 6 kV, duty cycle d = 50% in dc-dc pumpback, at 5 kHz and 10 kHz.

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