NEWS & EVENTS
CPES Technical Updates - Characterization, Packaging, and Application of High Voltage SiC MOSFET Power Semiconductors
Aug 20, 2020
On Thursday, August 20th, CPES will hold the second installment of Technical Updates for our Members. The topic of Characterization, Packaging, and Application of High Voltage SiC MOSFET Power Semiconductors will be explored through the presentation of two papers followed by Individual Discussions with the presenters:
- PCB-Based Gate Driver and Bus Bar for a 10 kV SiC MOSFET Power Module
Mark Cairnie, Jacob Gersh, Christina DiMarino
10 minute presentation with 5 minutes for Q&A - Third Quadrant Behavior of 10 kV SiC Planar MOSFET: New Device Findings and Circuit Implications
Ruizhe Zhang, Xiang Lin, Jingcun Liu, Slavko Mocevic, Yuhao Zhang
20 minute presentation with 5 minutes for Q&A - Individual Discussion with Presenters - Parallel Sessions
Mark Cairnie and Ruizhe Zhang
30 minutes - Move between rooms at any time
At 9:00am ET (US), the event will feature professionally recorded videos of slide presentations and hardware demonstrations to emulate, as closely as possible, the experience of visiting the CPES lab in-person. Individual Discussions, time for the audience to interact directly with the presenters, follow. The presentations will be recorded and replayed at 8:00pm ET (US).
This format will also be followed for the 2020 CPES & PEC Conferences taking place Aug 31st through Sep 4th.
All papers and recordings will be made available soon.
To access the Technical Update, please register on the 2020 CPES & PEC Conferences website by selecting the "CPES & PEC Member Registration" button. You will be added to the Technical Update and connection information sent to you.
See you there!
Learn more about https://cpes.vt.edu/news/news/975
