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CONFERENCE

2016 Lab Dialogue Sessions

Tuesday, April 5, 12:00 p.m. - 5:00 p.m.

Session D1: Modeling and Control

  • D1: State-Trajectory Control with Single-Cycle Response for POL Converters Virginia Li, Pei-Hsin Liu, Qiang Li, Fred C. Lee

  • Abstract: Among the various control schemes used for voltage regulator applications, variable-frequency control, such as Constant On-Time (COT), is popular. However, due to the fixed on-time of COT, the transient speed is limited and multiple cycles are necessary before steady-state is achieved. Variable-frequency control with variable on-time, such as Ramp Pulse Modulation (RPM), are able to demonstrate faster transient speed than COT, but may still require multiple cycles to reach steady-state. The fastest transient response is a single-cycle response. In this paper, two methods are proposed to achieve single-cycle load transient for current-mode control by improving the present control structures. For both methods of improvement, the operation mechanism of the control remains unchanged during steady-state. The proposed improvements can be used for existing current-mode controls.

  • D2: Dynamic Bus Voltage Control for Light Load Efficiency Improvement of Two-Stage Voltage Regulator Chao Fei, Mohamed H. Ahmed , Fred C. Lee, Qiang Li

  • Abstract: The 2-stage 48V-12V-1.8V VRM structure is gaining more and more attention in the high-end server application because of the significant improvement of the overall efficiency. The LLC converter is the preferred choice for the first conversion stage. It provides the isolated 12V output. The multi-phase VRM, then, takes 12V and converts it to 1.8V. This second stage conversion has to provide precision regulation with fast dynamic responses for CPU and related loads. Since the CPU works at sleep-mode in most of the time, the light load efficiency is very important for energy saving. However, the light efficiency is quite a challenge for the 2-stage structure. This paper proposes to change the primary side from full-bridge structure into half-bridge structure in the light load condition dynamically, so that the output of LLC DCX can be changed from 12V to 6V, which increases the overall light load efficiency significantly due to reduce core loss of LLC DCX and reduced switching loss of multi-phase VR. With this concept, the 2 stage 48V-12V/6V-1.8V structure with full-bridge & half-bridge control for LLC DCX is proposed. To achieve fast transition of bus voltage between 12V and 6V, the minimum capacitance for intermediate bus is investigated and optimal trajectory control for transition between full-bridge and half-bridge is proposed. Experimental results demonstrate that fast transient response and more than 10% light load efficiency improvement are achieved.

  • D3: Variable Slope External Ramp for Transient Performance Improvement in Constant On-time Current Mode Control Syed Bari, Brian Cheng, Qiang Li, Fred C Lee

  • Abstract: These days constant on time current mode (COTCM) control schemes are widely used in the industry for its light load efficiency, higher BW design with simpler compensation requirement and better transient performances. In COTCM control external ramp is often used to improve the noise performance by reducing jittering. But unfortunately, with the increment of external ramp value, although the jitter in the system gets reduced, transient performance becomes worse. Moreover, the system bandwidth also decreases with the increment of external ramp, which eventually slows down the transient response even more. For these reasons, from transient point of view, it is very challenging to use large external ramp in the system to reduce jittering. In this paper, a novel method is proposed to modify the external ramp at the transient instant to improve the transient response by increasing the slope of the ramp, and thus allows the control to use the large external ramp for noise performance improvement and enjoys the fast transient response at the same time.

  • D4: Energy-Harvesting Shock Absorbers with Riding Comfort controller on Vehicle Suspension Systems Chien-An Chen, Lei Zuo, Khai Ngo

  • Abstract: Input current/force of Mechanical-Motion Rectifier (MMR) can be controlled through proposed controller. Better passenger experience can be provided with a high efficient energy-harvesting suspension system. The nonlinear characteristics from one-way clutches and inertia in MMR induce disengagement and large equivalent capacitor, which makes the input current/force of MMR uncontrollable with conventional feedback controller design. Controller been used in continuous, linear system cannot be applied in MMR system. This paper presents an input current/force tracking (ICFT) controller for MMR based suspension system. Additional control laws are added in the conventional controller to conquer the nonlinearity issue during MMR control. Input current/force of MMR is controlled to follow the reference signal from skyhook. The vehicle body displacement is test with speedbump on ground. Displacement error between skyhook and ICFT-MMR is within 5%. The total harvested energy is 56 joules, as 56 W of average input power. Equivalent circuits are proved to have identical performances as mechanical models.

  • D5: Small-Signal Analysis and Optimal Design of Constant Frequency V2 Control Shuilin Tian, Fred C. Lee, Paolo Mattavelli, Yingyi Yan

  • Abstract: Recently, V2 control and its variety named ripple-based control has been gaining more and more popularity in academia research and commercial products. However, for constant frequency V2 control, design methodology is not clear due to insufficient knowledge about the small-signal model. This paper investigates the small-signal model and optimal design strategy for constant frequency V2 control. The factorized small-signal control-to-output voltage transfer function and output impedance are investigated. The stability criterion is obtained and design considerations are analyzed. Moreover, the small-signal model with ramp compensations is presented and optimal design guidelines from dynamic performance point of view are provided. For the first time, it is found the external ramp is good enough to get a well damped performance when current feedback strength is strong (for example, when employing OSCON capacitors). However, the current ramp is necessary to achieve a good dynamic performance when the current feedback strength is weak (for example, when employing ceramic capacitors). As a result, a new control strategy with the hybrid ramp is proposed for ceramic capacitor applications. The small-signal model and proposed design guidelines are verified with Simplis simulation and experimental results.

  • D6: Equivalent Circuit Modeling of LLC Resonant Converter Shuilin Tian, Fred C. Lee, Qiang Li

  • Abstract: LLC resonant converter is widely used in industry. However, up to now, no simple and accurate small-signal equivalent circuit model is available. This paper proposes an equivalent circuit model of LLC resonant converter. The simple equivalent circuit model is derived based on modification and simplification of extended describing function method. The model can well predicts the small-signal behaviors observed in LLC resonant converter, whenever switching frequency is below, close to or above the resonant frequency. For the first time, analytical expressions for control to output voltage, input to output voltage, input impedance and output impedance are provided to aid close loop feedback design. Simplis simulation and experimental results are presented to prove the accuracy of the model.

  • D7: Unified Equivalent Circuit Model and Optimal Design of V2 Controlled Buck Converters Shuilin Tian, Fred C. Lee, Qiang Li, Yingyi Yan

  • Abstract: V2 control has advantages of simple implementation and fast transient response and is widely used in industry for point of-load applications. This control scheme is elegant when output capacitors with large RC time constant are employed, such as OSCON capacitors. However, in most cases using capacitors with small RC time constant, such as ceramic capacitors, instability problem will occur. Previous modeling methods including sampled-data modeling, discrete-time analysis, time-domain analysis, and describing function are all very mathematical and difficult to apply for practical engineers as little physical insight can be extracted. Up to now, no equivalent circuit model is proposed which is able to predict the instability issue and serve as a useful design tool for V2 control. This paper proposes a unified equivalent circuit model which is applicable to all types of capacitors by considering the effect of capacitor voltage ripple. The equivalent circuit provides the physical insight of V2 control as a non-ideal voltage source, a dual concept of previous non-ideal current source for current-mode control. The equivalent circuit model is a simple yet accurate complete model and is very helpful for design purpose. Optimal design guidelines for point-of-load applications are provided. The proposed equivalent circuit model is applicable to both variable frequency modulation and constant frequency modulation. The equivalent circuit model and design guidelines are verified with Simplis simulation and experimental results.

  • D8: Modeling and Analysis of High Frequency Interactions for Distributed Power System Xiaolong Yue, Dushan Boroyevich, Rolando Burgos, Fang Zhuo

  • Abstract: Power electronic converters are single input multiple output (SIMO) systems in frequency domain. In distributed power system (DPS), one converter's switching frequency ripples are another converter's perturbations and beat frequency components are generated due to their SIMO characteristics. As the control loops of power converters always take high gains in low frequency regions, if the beat frequency component is relatively low, they may be magnified and presented as oscillations, which will introduce power quality issues. This paper proposes a matrix-based multi-frequency output impedance model to describe the SIMO characteristics of power converters and to analyze the high frequency interactions of DPS. The boost converter is specifically illustrated as demonstration. The proposed model indicates that the variation of switching frequency, as well as those traditionally discussed parameters of control loops and passive components, could also change output impedance characteristics and introduce system instability. In DPS, the beat frequency oscillation that traditional models fail to explain could be accurately predicted by the proposed model. In addition, based on the proposed model, the switching frequencies for power converters can be optimized to improve the stability of power electronic based systems. Simulation and experimental results validate the accuracy and effectiveness of the proposed method.

  • D9: Assessment of Medium Voltage Distribution Feeders under High Penetration of PV Generation Ye Tang, Rolando Burgos, Chi Li, Dushan Boroyevich

  • Abstract: With an increasing number of PV penetrations at the distribution system, the impact on the distribution system is no longer negligible. The complexity of impact assessment comes from the increasing installation capacity and variable control of PV generators as well. Steady state models are developed for PV plants working on three different reactive power modes. To assess the impact of PV injection on system voltage profile and power loss, a sensitivity matrix and a sensitivity index are proposed separately, for system voltage increase and system power loss over active power injected by solar generators. The accuracy of these sensitivity indices are proven by calculation results from MATLAB and simulation results from PSS/E of a 12kV distribution system.

  • D10: Multichannel LED Driver with CLL Resonant Converter Xuebing Chen, Daocheng Huang, Qiang Li, Fred C. Lee

  • Abstract: This paper proposes a two-stage multi-channel LED driver, which contains a buck converter as the first stage and a multi-channel constant current (MC3) CLL resonant converter as the second stage. The forward current of one specific LED string is sensed for feedback control to regulate the bus voltage, which is also the input voltage of the MC3 CLL resonant converter. In contrast, the MC3 CLL is unregulated and always working around the resonant frequency point to achieve best efficiency. Therefore, this two-stage LED driver could achieve high efficiency within a wide load range. Furthermore, for the MC3 CLL resonant converter, the magnetizing inductance of the
    transformer can be as large as possible, so the current sharing among the transformer modules is very good, even under unbalanced load conditions. Meanwhile, the currents of two LED strings driven by the same transformer is balanced via a DC blocking capacitor. As a result, this two-stage LED driver can achieve good current balance even with a large load variation. Finally, the merits of this two-stage LED driver are verified by experiment.

  • D11: Design, Analysis and Experimental Evaluation of a Virtual-Synchronous-Machine-Based STATCOM with LCL Filter Chi Li, Rolando Burgos, Igor Cvetkovic, Dushan Boroyevich, Lamine Mili

  • Abstract: To address the generation uncertainty problems introduced by renewable energy power plants, STATCOMs are a typical solution to smoothen the point of common coupling (PCC) voltage in order to facilitate the integration of the renewables. A recently proposed control method - virtual synchronous machine (VSM), which controls grid-interfaced inverters to behave like synchronous machines so as to be more compatible with the existing power grid, has been applied to STATCOM and shows an improved performance over conventional D-Q frame based STATCOMs, along with tunable parameters that can be adjusted to different scenarios. In this paper, the idea is extended to a realistic STATCOM with LCL filter to mitigate harmonics and also some practical concerns about the active power compensation during transients, which is introduced uniquely by the VSM control method. Also a scaled down test bed is constructed to validate the control schemes.

  • D12: State Trajectory Analysis of Modular Multilevel Converter Chen Li, Fred C. Lee

  • Abstract: The modular multilevel converter (MMC) was a recently introduced convertor topology with the potential for high-voltage direct current (HVDC) transmission and motor drive application. One of the disadvantages of MMC was that large capacitors are required to deal with voltage ripple in modules. In many paper, several control strategies were introduced to reduce the capacitor voltage ripple. One of the most effective method is injecting circulating current to eliminate 2nd order harmonic power in sub-module. Recently, a new method is introduced, which can eliminate the fundamental power of sub-module by change the modulation index M. The state trajectory can offer us a clear vision view in order to analyze the working condition of every control method. In this paper, the analysis of state trajectory will be introduced. And different control strategies will be compared with state trajectory.

  • D13: Modeling and Control of Grid-Connected Voltage Source Converters Emulating Isotropic and Anisotropic Synchronous Machines Igor Cvetkovic, Dushan Boroyevich, Rolando Burgos, Chi Li, Paolo Mattavelli

  • Abstract: With recent revision of the IEEE 1547 standard that now for the first time allows distributed generation to regulate voltage at the point of common coupling, numerous research groups have started exploring unconventional ways to control grid-interface converters. Such change incontrovertibly requires new concepts for advanced control of all energy flows in order to improve system stability, energy availability, and efficiency. Consequently, high dispersion of renewable energy sources will highly depend on engineers' capability to understand, model, and dynamically control power sharing and subsystem interactions. This paper presents, with deep insight, how to control power converters as synchronous machines of any type in d-q coordinate system; more precisely, by formally establishing electromechanical-electrical duality, understand which parameters of power converters relate to which parameters of isotropic or anisotropic synchronous machines.

  • D14: Small-Signal Stability Analysis of Three-Phase AC Systems in the Presence of Constant Power Loads Based on Measured d-q Frame Impedances Bo Wen, Dushan Boroyevich, Rolando Burgos, Paolo Mattavello, Zhiyu Shen

  • Abstract: Small-signal stability is of great concern for electrical power systems with a large number of regulated power converters. In the case of dc systems, stability can be predicted by examining the locus described by the ratio of the source and load impedances in the complex plane per the Nyquist stability criterion. For balanced three-phase ac systems the same impedance-based method applies, for which this paper uses impedances in the synchronous rotating reference (d-q) frame. Small-signal stability can be determined by applying the generalized Nyquist stability criterion (GNC). This approach relies on the actual measurement of these impedances, which up to now has severely hindered its applicability. Addressing this shortcoming, this paper investigates the small signal stability of a three-phase ac system using measured d-q frame impedances. The results obtained show how the stability at the ac interface can be easily and readily predicted using the measured impedances and the GNC, thus illustrating the practicality of the approach, and validating the use of ac impedances as a valuable dynamic analysis tool for ac system integration, in perfect dualism with the dc case.

  • D15: Small-Signal Impedance Measurement in Medium-Voltage DC Power Systems Zhiyu Shen, Marko Jaksic, Igor Cvetkovic, Rolando Burgos, Dushan Boroyevich

  • Abstract: This paper describes design and implementation a impedance measurement unit for medium-voltage dc power systems, focusing on the injection circuit and its control. The unit is capable of characterizing in-situ source and load impedances in dc power system up to 6000 V dc and 300 A in the frequency range from 0.1 Hz - 1 kHz.

  • D16: Synchronous Machine-Based Multi-Converter System With Online Interaction Monitoring Function Igor Cvetkovic, Dushan Boroyevich, Rolando Burgos, Chi Li, Paolo Mattavelli

  • Abstract: The advancement of power electronics has been a key enabler of the vast proliferation of renewable energy sources in the electrical power grid over the past several years, acting both as energy source interface and as compensation asset in HVDC and FACTS-supported ac systems for energy transport. This trend, together with the ever-increasing deployment of electronically-interfaced loads, as well as the increasing penetration of microgrids, is fundamentally changing the nature of the sources and the loads in the electrical grid, altering their conventionally mild aggregate dynamics, and inflicting low- and high- frequency dynamic interactions that existed never before.

    With the recent revision of the IEEE 1547 standard that now for the first time allows distributed generation to regulate voltage at the point of common coupling, numerous research groups have started exploring unconventional ways to control grid-interface converters. Such change incontrovertibly requires new concepts for advanced control of all energy flows in order to improve system stability, energy availability, and reliability. This paper presents a grid-interface converter that behaves as a synchronous machine, and shows how its adaptive virtual inertia can mitigate system instability caused by partial loss of generation. Additionally, it shows one of the ways to implement an online stability monitoring function by observing small-signal active and reactive power at converter terminals.

  • D17: Voltage Controlled Converter Emulating Synchronous Machine - Model Verification Igor Cvetkovic, Dushan Boroyevich, Rolando Burgos, Yi-Hsun Hsieh, Fred C. Lee, Chi Li

  • Abstract: This paper shows experimental verification of the converter-like synchronous machine model, showing clearly how to control power converters as a particular synchronous machine used in the testbed. The paper also shows details of the dynamic characterization of the particular generator, as well as its parameter extraction.

  • D18: Analysis of Capacitor Voltage Ripple Minimization in Modular Multilevel Converter Based on Average Model Alinaghi Marzoughi, Rolando Burgos, Dushan Boroyevich, Yaosuo Xue

  • Abstract: This paper investigates reduction of submodule voltage ripple in modular multilevel converter (MMC). The reduction is achieved by injecting the optimum amount of circulating current across the phase leg of the converter. The magnitude and phase angle of arm currents and submodule voltage quantities are calculated via an average model derived for the MMC topology. Then based on the derived equations for submodule voltage components at different ac frequencies, an effort is done to calculate and inject the optimum magnitude of circulating current in order to minimize the voltage fluctuation across submodule capacitors. Also in this paper, the effect of natural and optimized circulating currents on converter losses and efficiency is investigated via calculating semiconductor losses.

  • D19: Analysis of Phase-Locked Loop Low-Frequency Stability in Three-Phase Grid-Connected Power Converters Considering Impedance Interactions Dong Dong, Bo Wen, Dushan Boroyevich, Paolo Mattavelli, Yaosuo Xue

  • Abstract: Synchronous reference frame (SRF) phaselocked loop (PLL) is a critical component for the control and grid synchronization of three-phase grid-connected power converters. The PLL behaviors, especially its lowfrequency dynamics, influenced by different grid and load impedances as well as operation mode have not been investigated yet, which may not be captured by conventional linear PLL models. In this paper, we propose a statefeedback quasi-static SRF-PLL model, which can identify and quantify the inherent frequency self-synchronization mechanism in the converter control system. This selfsynchronization effect is essentially due to the converter interactions with grid impedance and power flow directions. The low-frequency nonlinear behaviors of the PLL under different grid impedance conditions are then analyzed, which forms the framework of evaluating the impacts of the large penetration level of distributed generation units, weak grid, microgrid, and large reactive power consumption in terms of the frequency stability of PLL. Specifically, the PLL behavior of the converter system under islanded condition is investigated to explain the PLL instability issues and the related islanding-detection methods in early publications and industry reports.

  • D20: Testing of a Novel Medium Voltage Impedance Measurement Unit Karl Schoder, Micha Steurer, Ferenc Bogdan, John Hauer, James Langston, Dushan Boroyevich, Rolando Burgos, Igor Cvetkovic, Zhiyu Shen, Christina DiMarino

  • Abstract: In recent years, the interest in deriving new concepts for electric distribution systems that build on power electronics converter interfaces for system components has increased rapidly. This interest is based on the promise that the power electronics based interfaces between distribution and generation/loads bring about higher efficiency, compacter implementation, and improved controllability. Nevertheless, ensuring stability of these converter dominated systems is a challenge. One means of analyzing stability properties is through measuring impedances, i.e., measuring input and output impedances of connected components. This paper presents results of testing the first available medium voltage impedance measurement unit.

  • D21: Wide-Bandwidth Identification of Small-Signal dq Impedances of AC Power Systems via Single-Phase Series Voltage Injection Marko Jaksic, Zhiyu Shen, Igor Cvetkovic, Dushan Boroyevich, Rolando P. Burgos, Paolo Mattavelli

  • Abstract: The injection of single-phase wide-bandwidth signals into three-phase ac power systems significantly reduces measurement time using the hardware with minimized number of components. Interleaved transformer-less H-bridge converter is optimized to operate as a series voltage injector, increasing the low frequency injection range by avoiding transformer saturation problems. The decoupling control is implemented, providing the effective way to balance dc capacitor voltages and regulate the series injection voltage. The modular and scalable single-phase impedance measurement unit (IMU) is designed and constructed to inject chirp, multi-tone and sinusoidal signals in series with the three-phase ac power systems. The measurement system is designed to inject all three types of signals in the full frequency range, offering a trade-off between measurement time, identification process precision, and number of identification points. The effectiveness of the proposed identification approach is verified with the online estimation of source and load impedances of actively controlled programmable voltage source and a three-phase resistive load.

  • D22: Small-Signal Terminal Characteristics Modeling of Three-Phase Boost Rectifier with Variable Fundamental Frequency Zeng Liu, Jinjun Liu, Dushan Boroyevich

  • Abstract: AC power electronics system are prone to instability due to the interaction between the power converters, and terminal characteristics of individual power converter based criteria are very attractive for analyzing stability of whole system. However, more and more AC power electronics systems emerge with the feature of variable fundamental frequency, while existing approaches for stability analysis are just suitable for systems with constant fundamental frequency. To overcome this problem, terminal characteristics of the three-phase boost rectifier are modeled considering the dynamic behavior of the fundamental frequency in this paper, which will be beneficial for terminal characteristics based stability analysis of three-phase AC power electronics system with variable fundamental frequency. Finally, the proposed model is verified in frequency domain.

  • D23: DC Fault Control of Modular Multilevel Converter with Full-Bridge Cells Jianghui Yu, Rolando Burgos, Vahid Najmi, Dushan Boroyevich

  • Abstract: Modular Multilevel Converter is a promising converter for Medium-voltage DC application. However, the conventional Half-Bridge cell is vulnerable to DC short circuit fault. MMC with Full-Bridge cell has multiple advantages, especially the fault handling capability. It is known to be capable of managing the DC fault in an uncontrolled way. This paper proposes a DC fault control method based on MMC with FB cells. MMC could operate during fault condition with fault current cleared and cell voltage maintained. The control method is demonstrated by simulation in "MATLAB/Simulink".


Session D2: GaN Devices and Applications

  • D1: Comparative Performance Assessment of SiC and GaN Power Rectifier Technologies Sauvik Chowdhury, T. Paul Chow

  • Abstract: Silicon carbide and gallium nitride based Schottky and pin junction power rectifiers offer different performance trade-offs in terms of metrics such as forward voltage drop, switching energy loss and surge current capability. The goal of this paper is to identify the application space for different rectifier technologies. An analytical comparison between the performance of different power rectifier diodes for breakdown voltages ranging from 600V to over 8 kV is presented. It is shown that although GaN SBD offers some advantage over SiC diodes due to lower losses, low surge current capability of GaN may hinder its widespread adoption in applications.

  • D2: Temperature Dependence of GaN MOS Capacitor Characteristics Zhibo Guo, Ke Tang, T. Paul Chow

  • Abstract: GaN MOS capacitors on both as-grown and dry/wet-etched GaN surfaces are characterized by C-V and G- measurements at elevated temperatures. The nature of GaN/SiO2 interface traps are determined in detail by extracting interface trap density, surface potential fluctuation, trap time constant and capture cross-section. When tem-perature increases, trap time constant decreases so that more traps become active and contribute to observed higher interface trap density, especially for traps at deeper energy levels. The deeper trap levels activated at higher temperatures also induce corresponding temperature-dependent surface potential fluctuation variations.

  • D3: Ultra-Low Inductance Vertical Phase Leg Design with EMI Noise Propagation Control for Enhancement Mode GaN Transistors Xuning Zhang, Zhiyu Shen, Nidhi Haryani, Dushan Boroyevich, Rolando Burgos

  • Abstract: This paper presents an improved phase leg power loop design for enhance mode lateral structure Gallium Nitride (GaN) transistors. Static characterization results of a 650V/30A GaN transistor are presented to determine the design parameters of the gate driver circuits. The control of Common Mode (CM) noise current propagation is considered during the gate driver design by optimizing the power distribution and grounding structure of the gate driver and digital control circuits. By differentiating the propagation path impedance of digital control circuits and their power supply circuits, conductive CM noise can propagate through power supply path to protect the digital control circuits. In order to reduce current commutation loop inductance within the GaN phase leg, an improved power loop design with vertical structure is proposed for lateral structure GaN transistors which can significantly reduce power loop inductance compared with conventional lateral power loop design. The design is verified through experiments on a phase leg prototype which prove the performance of the proposed phase leg on the overvoltage reduction during current transition along with less cross-coupling between power loop and gate loop compared with conventional lateral power loop design. A full bridge voltage source inverter is implemented with the designed phase leg and tested with EMI noise measurement that verifies the effectiveness of the CM propagation path control.

  • D4: Driving and Sensing Design of an Enhancement-Mode-GaN Phase-Leg as a Building Block Lingxiao Xue , Dushan Boroyevich, Paolo Mattavelli

  • Abstract: The approach of integrating a GaN phaseleg, current-boost drivers, and decoupling capacitors can significantly minimize the power loop inductance and the gate loop inductance. However, the driving scheme and sensing scheme are still critical and challenging in order to survive the highly noisy environment due to the GaN switching. A driving scheme of digital isolator plus isolated power supply is used for both switches of the phaseleg. To suppress the noise propagated to the PWM generating board, a common-mode choke and two Y-capacitors are used. A GaN boost converter proved the reduction of noise current through the PWM cables. For the sensing circuit design, filtering is necessary for all the sensors. Even with the filters, it turns out that only the DC current sensor can be placed with the phaseleg while the DC voltage sensor and AC current sensor have to stay away from the high dv/dt and di/dt nodes.

  • D5: High-Efficiency Two-Stage 48V VRM for Server Application Mohamd H. Ahmed, Fred C. Lee, Qiang Li, Chao Fei

  • Abstract: High efficiency power supply solutions for data centers are gaining more attention to minimize the fast growing power demands on these loads, the 48v VRM for powering CPU is a promising solution replacing the legacy 12v VRM in order to minimize the bus distribution loss, cost and size. In this paper, a two stage 48v/12v/1.8v - 250W VRM is proposed where the first stage is a high frequency, high efficiency DC/DC transformer (DCX) based on LLC resonant converter. The Matrix transformer concept was used to design the first stage transformer utilizing two transformer sets in one core structure, an enhanced termination was proposed by embedding the secondary synchronous rectifiers (SRs) resulting in significant reduction in both leakage inductance and winding AC resistance. The second stage is a 4-phases buck converter, the high efficiency and high power density of the first stage combined with simplicity and high BW control of the second stage shows that the two stage approach is a good candidate for this application. A light load efficiency improvement method by lowering the bus voltage from 12v to 6v during light load was proposed showing a 5 points light load efficiency enhancement than fixed bus voltage. Experimental results demonstrate the high efficiency of the proposed solution reaching peak of 91% with a significant light load efficiency improvement.

  • D6: Avoiding Divergent Oscillation of Cascode GaN Device under High Current Turn-off Condition

  • Abstract: Cascode structure is widely used for high voltage normally-on GaN devices. However, the capacitance mismatch between the high voltage GaN device and the low voltage normally-off Si MOSFET may induce several undesired features, such as Si MOSFET reaches avalanche during turn-off, and high voltage GaN device loses ZVS turn-on condition internally during soft-switching turn-on process in every switching cycle. This paper presents another issue associated with the capacitance mismatch in the cascode GaN devices. Divergent oscillation could occur at high current turn-off condition, and eventually destroy the device. The intrinsic reason of this phenomenon is analyzed in detail in this paper. A simple solution is proposed by adding an additional capacitor whose position is critical and should be optimized. Experimental results validate the theoretical analysis, and show that the proposed method improves device performance significantly under high current turn-off condition.

  • D7: Wide Range and High Power Density GaN-Based DC-DC Converter Design Xingye Liu, Xuning Zhang, Rolando Burgos, Dushan Boroyevich

  • Abstract: A DC-DC power supply is designed and optimized to deal with the eight times input voltage while giving two 15V stable outputs. Revised active-clamp flyback is chosen as the converter topology and detailed operation is followed by components design. To meet power density and entire converter volume's requirement, embedded transformer is designed with size optimized converter structure. The converter is going to achieve high efficiency as well. The loss and features comparisons are given to show the benefits and limitation of the design. The whole power supply can provide 30W max output.

  • D8: Ultra-Low Inductance Phase Leg Design for GaN-Based Three-Phase Motor Drive Systems Xuning Zhang, Zhiyu Shen, Nidhi Haryani, Dushan Boroyevich, Rolando Burgos

  • Abstract: This paper presents an improved phase leg power loop design for enhance mode lateral structure Gallium Nitride (GaN) transistors. Static characterization results of a 650V/30A GaN transistor are presented. The gate driver circuit is designed based on the characterization results. In order to reduce current commutation loop inductance within the GaN phase leg, an improved power loop design with vertical structure is proposed for lateral structure GaN transistors. The control of Common Mode (CM) noise current propagation is also considered during the gate driver design by optimizing the power distribution and grounding structure of the gate driver and digital control circuits. By differentiating the propagation path impedance of digital control circuits and their power supply circuits, conductive CM noise can propagate through power supply path to protect the digital control circuits. The design is verified through experiments on a phase leg prototype which prove the effectiveness of the proposed phase leg on the overvoltage reduction during current transition along with less cross-coupling between power loop and gate loop compared with conventional lateral power loop design. Finally, a three-phase motor drive system is designed and tested based on the proposed phase leg.

  • D9: A Novel AC-to-DC Adaptor with Ultra-High Power Density and Efficiency Yan-Cun Li, Xiucheng Huang, Zhengrong Huang, Zhengyang Liu , Fred C. Lee , Qiang Li

  • Abstract: This paper proposes a novel ac-to-dc adaptor circuit with ultra-high power density and efficiency, which is based on a two-stage topology, consists of a bridgeless boost converter followed by a LLC converter. The bridgeless boost converter is in charge of regulating output voltage and minimizing bulk capacitor, while the LLC converter is operated as a dc transformer (DCX) and plays a role of providing isolated voltage step-down, maximizing circuit efficiency and simplifying the control circuit. Furthermore, in order to achieve ultra-high power density and high efficiency, the proposed circuit applies gallium nitride (GaN) devices and planar transformer, while operates the circuit to around 1MHz to shrink both the sizes of EMI filter and magnetic components. By applying the proposed circuit, both the features of high performance and compact volume could be achieved; up to 44.22W/in3 power density and 94% efficiency are obtained from a 65W ac-to-dc adaptor prototype.

  • D10: Evaluation and Applications of 600V/650V Enhancement-Mode GaN Devices Xiucheng Huang, Tao Liu, Bin Li, Fred C. Lee, Qiang Li

  • Abstract: This paper presents elaborate evaluation of 600V/650V enhancement mode gallium nitride (GaN) devices. The switching loss mechanism and the impact of package and driving circuit parameters are illustrated in detail. The hard-switching turn-on loss is dominant due to junction capacitor charge of the free-wheeling switch. The turn-off loss is much smaller and it can be further improved by driving circuit parameters and packaging. The driving circuit taking consider of high dv/dt and di/dt immunity is discussed. A few design examples are shown to demonstrate the advantage of GaN and the impact of GaN on system design.

  • D11: Digital-Based Interleaving Control for GaN-Based MHz CRM Totem-Pole PFC Zhengyang Liu, Zhengrong Huang, Fred C. Lee, Qiang Li

  • Abstract: In this paper, the performance of different interleaving control methods for gallium-nitride (GaN) devices based MHz critical conduction mode (CRM) totem-pole power factor correction (PFC) circuit is compared. Both closed-loop interleaving and open-loop interleaving are good for low frequency CRM PFC; but for MHz very high frequency CRM PFC with microcontroller (MCU) implementation, open-loop interleaving outperforms closed-loop interleaving with small and non-amplified phase error. After software optimization, the phase error of open-loop interleaving is smaller than 3 degree at 1MHz, when the control is implemented by 60MHz low cost MCU. Significant ripple cancellation effect and differential-mode (DM) filter size reduction is achieved with good interleaving. For a 1.2kW MHz totem-pole PFC, the DM filter size is reduced to one quarter compared to the counterpart of a 100kHz PFC. Last but not least, the stability of open-loop interleaving is also analyzed indicating that the MHz CRM totem-pole PFC with voltage-mode control, open-loop interleaving, and turn-on instant synchronization can maintain critical mode operation with better stability compared to low frequency CRM PFC.

  • D12: Design of High-Frequency CRM AC/DC Converter for WBG-Based 6.6 kW Bidirectional On-Board Battery Charger Zhengyang Liu, Fred C Lee, Qiang Li, Bin Li

  • Abstract: A wide-band-gap (WBG) devices based 6.6kW bidirectional on-board charger (OBC) system is recently developed for plug-in electric vehicles (PEVs). With proposed novel variable DC-link voltage system architecture, high frequency soft switching operation, and integrated magnetics, the developed OBC system is becoming more compact and more efficient compared to a SiC-based counterpart. Detailed design considerations of the AC/DC stage are introduced in this paper including evaluation of 1.2kV SiC MOSFETs; zero-voltage-switching (ZVS) extension function for line-cycle ZVS operation; and a novel universal control strategy for both rectifier mode and inverter mode. A prototype of AC/DC stage is built which achieves 47W/in3 power density and 98.5% efficiency at higher than 300kHz switching frequency. Finally, a complete 6.6kW OBC system using both SiC and GaN devices is also demonstrated with 24W/in3 power density and above 96% efficiency.

  • D13: Microcontroller-Based MHz Totem-Pole PFC with Critical Mode Control Zhengrong Huang, Zhengyang Liu, Qiang Li, Fred C. Lee

  • Abstract: This paper focuses on how to implement critical conduction mode (CRM) control for GaN-based MHz totem-pole PFC with a commercial low-cost microcontroller (MCU), including basic CRM operation, programmed on-time control for achieving low current THD, off-time extension for achieving ZVS for whole line cycle operation, and two-phase interleaving control for input current ripple cancellation and EMI filter size reduction. A novel but very simple zero-crossing-detection (ZCD) method is proposed to solve signal processing delay issue to realize CRM operation for MHz totem-pole PFC. A simple but very accurate on-time calculation method is also proposed for implementing programmed on-time control at high frequency. The result of aforementioned control function integration and implementation is demonstrated on a 1.2kW GaN-based MHz totem-pole PFC prototype.

  • D14: Dynamic Characterization of 650 V GaN HEMT with Low Inductance Vertical Phase Leg Design for High Frequency High Power Applications Nidhi Haryani, Xuning Zhang, Rolando Burgos, Dushan Boroyevich

  • Abstract: In this paper, dynamic characterization of the new 650 V GaN devices from GaN Systems is discussed in detail. The gate driver design from GaN Systems' application note[1] is also examined. Due to the high slew rate of these devices, it is important to incorporate galvanic isolation between gate driver input and output stage as recommended in [1]. Furthermore, the gate loop and power loop stray inductances and capacitances need to be minimized to curtail the switching noise. To achieve this, vertical power loop design with very small parasitic inductance is proposed. The dynamic characterization carried with this design shows reduction of voltage overshoot to less than half compared to the lateral power loop design from [1]. Finally, the issue of performance degradation of devices with time is also discussed.

  • D15: Design and Optimization of High Frequency High Current LLC Converter with Planar Matrix Transformers Mingkai Mu, Fred C. Lee

  • Abstract: The data centers are demanding high current high efficiency low cost power solution. The high voltage DC distribution power architecture is getting popularity due to lower conduction loss on cables and harness. In this structure, the 380-12V high output current isolated converter is the key stage. A 1 MHz 1kW LLC resonant converter using GaN devices and planar matrix transformer is designed and optimized for this application. The transformer design and optimization of output capacitor termination are performed and verified. Finally, this cost effective converter achieves above 97% peak efficiency and 700W/in3 power density.


Session D3: SiC Devices and Applications

  • D1: High-Density, Fast-Switching 1.2 kV, 90 A Diode-Less SiC MOSFET Half-Bridge Module and Gate Drive Design Christina DiMarino, Nidhi Haryani, Wenli Zhang, Rolando Burgos, Dushan Boroyevich

  • Abstract: High-current-density SiC devices with ratings close to 100 A per chip have recently been released. Utilizing these devices in synchronous operation with the body diode used for dead time commutation allows the external antiparallel diode to be eliminated, which further increases the module power density without sacrificing the efficiency. In this work, a 1.2 kV, 90 A diode-less SiC MOSFET half-bridge module was designed, fabricated, and tested. The half-bridge module has a low gate- and power-loop inductance (2.4 nH and 3 nH, respectively), and more than twice the power density and less than half of the switching loss as similarly-rated commercial half-bridge modules (7.8 W/mm3 and 1.3 mJ, respectively). A fast half-bridge gate driver with high dv/dt immunity was also developed in this work.

  • D2: Static and Dynamic Performance Characterization of 3.3-kV 30A Discrete SiC MOSFETs Alinaghi Marzoughi, Rolando Burgos, Dushan Boroyevich, Kosuke Uchida, Toru Hiyoshi, Mitsuhiko Sakai, Keiji Wada, Masaki Furumai, Takashi Tsuno, Yasuki Mikamura

  • Abstract: This paper characterizes and compares the room temperature and high temperature performances of the discrete 3.3-kV 30A SiC MOSFETs from Sumitomo Electric Industries (SEI). The tested MOSFETs are in TO-247 full-mold package. A complete static and dynamic characterization is done on all devices at three different temperatures 25C, 100C and 150C, feeding the devices with their recommended -5/ 15V gate-to-source voltage according to datasheet. The static characterization includes output characteristic, transfer characteristic, on-state resistance, threshold voltages and capacitance measurements. The dynamic characterization at the other hand includes double-pulse tests at the same temperatures at four different gate resistances to achieve the loss variation versus gate resistance for the devices. The switching losses are calculated and compared through these double-pulse tests.

  • D3: Characterization and Comparison of Latest Generation 900-V and 1.2-kV SiC MOSFETs Alinaghi Marzoughi, Rolando Burgos, Dushan Boroyevich

  • Abstract: This paper performs static and dynamic performance characterization of latest generation 900-V and 1.2-kV discrete Silicon Carbide (SiC) MOSFETs from four well-known manufacturers: CREE, ROHM, General Electric (GE) and Sumitomo Electric Industries (SEI). The static characterization performed includes acquisition of output characteristic, transfer characteristic, specific on-state resistance, threshold voltages and junction capacitances of the devices under test (DUTs). The static characterizations are done at 25C and 150C to investigate variation of parameters versus temperature. At the other hand for dynamic characterization, following a double-pulse tester deigns the tests are done at four different temperatures on all devices: 25C, 100C, 150C and 200C. In the double-pulse tests recommended gate voltage is applied to all devices and the switching speeds are matched. The switching losses are computed from double-pulse test (DPT) results.

  • D4: A 50 kW SiC Three-Phase AC-DC Converter Design for High Temperature Operation Zheng Chen, Ruxi Wang, Yiying Yao, Milisav Danilovic, Wenli Zhang, Christina DiMarino, Dushan Boroyevich, Rolando Burgos, Khai Ngo, Kaushik Rajashekara

  • Abstract: This work seeks to demonstrate the feasibility of developing a complete high temperature, 50 kW bidirectional three-phase AC-DC power converter unit for 200C settings. In the realization of this unit, high temperature SiC power modules were fabricated in order to achieve improved performance under extreme temperature conditions. This endeavor required the development of high temperature packaging of active devices, as well as a survey and characterization of high temperature passive and electronic control components. This paper will discuss the system integration of the power converter, and present the results of the double-pulse tests conducted in a 200C ambient environment and the three-phase operation.

  • D5: Dynamic Sharing Between Paralleled SiC MOSFETs Caused by Threshold Voltage Mismatch Yincan Mao, Zichen Miao, Khai D.T. Ngo

  • Abstract: In this paper, influences of parasitic inductances on parallel dynamic performance are comprehensively investigated with regard to switching loss, voltage stress, and switching loss imbalance. Dynamic imbalance caused by Vth mismatch is quantified and then mitigated though a passive way, in other words, utilizing electromagnetic field of layout parasitics. Complicated current sensing and active gate driver designs will be avoided. Inherent balancing capability is realized during the process of layout design. Net current balancing can be achieved without sacrificing switching loss or overstressing devices.

  • D6: Design of a Modular and Scalable Small-Signal dq Impedance Measurement Unit for Grid Applications Utilizing 10 kV SiC MOSFETs Zhiyu Shen, Igor Cvetkovic, Marko Jaksic, Christina DiMarino, Rolando Burgos, Dushan Boroyevich, Fang Chen

  • Abstract: Not only that tremendously increased employment of power electronics in the energy production, transfer, and consumption enables a sustainable future, it undoubtedly brings major energy savings and stimulating improvements in people's quality of life. But not for "free". This trend is considerably changing the nature of the sources and the loads in the electrical grid, altering their mild properties, and inflicting low-frequency dynamic interactions that did not exist in the conventional power system before. To be able to understand, analyze, design, and dynamically control the existing and future power systems, it is unarguably required to develop concepts and tools that offer better insights into the system-level behavior and stability of the grid. This paper presents the impedance measurement unit that can undoubtedly address some of the listed needs by characterizing in-situ source and load impedances of the sub transmission medium-voltage networks (up to 69 kV). In addition to describing the design, this paper shows the experimental results obtained with the impedance measurement unit prototype built for 4.16 kV, capable of characterizing medium-voltage distribution systems of up to 2.2 MVA.

  • D7: Electro-Thermal Distribution Among Paralleled SiC MOSFETs Lujie Zhang, Khai Ngo

  • Abstract: With current limit by the small size, SiC MOSFETs are paralleled to achieve high current rating and power density. However, mismatch in parameters causes unbalanced junction temperature and drain current distribution, which may affects the reliability and longevity of the devices. Usually extra components or strategies are introduced to attenuate the unbalance, which will highly increase the cost and the complexity of the system with more MOSFETs in parallel. Therefore, electro-thermal distribution among paralleled SiC MOSFETs is analyzed based on simulation and experiment to find out useful intrinsic property hidden in the SiC MOSFET.

  • D8: High Frequency High Power Transformer for DC Distribution Data Center Shishuo Zhao, Qiang Li, Fred C.Lee

  • Abstract: In both AC and DC date center power architectures, a line frequency transformer is employed to step down a medium voltage AC to 480VAC and distribute 480VAC throughout the facilities. We propose to utilize a medium voltage line 4.16 kV AC as the distribution bus within the data center facilities following by low voltage solid-state transformers (SST) in a cascade configuration. Output is paralleled to 380V DC to eliminate redundant power conversion stages. DC/DC conversion stage is the key element in overall system. Wide band gap devices are characterized to run DC/DC stage at unprecedented 500 kHz to minimize magnetic size and weight. Sectionalize winding structure design is carefully considered according to insulation standard requirement. Based on insulation parameter, core loss and litz wire loss modeling are introduced for transformer optimization. Optimal turn number and wire AWG is chosen accordingly.

  • D9: Advances in SiC-Based Power Conversion for Shipboard Electrical Power Systems Terry Ericsen, Ravisekhar Raju, Rolando Burgos, Dushan Boroyevich, Sharon Beermann-Curtin

  • Abstract: This paper presents the evolution, state of the art, and prospective future of Silicon-Carbide (SiC) based power electronics conversion for shipboard electrical power systems. The latter, having fully profited from the integrated power system (IPS) all-electric ship concept, now face the challenge of an ever increasing electrical payload, with enhanced service and advanced sensors and weapon systems that are forecasted to surpass the onboard propulsion power in next generation ships. Power density has accordingly become crucial in this development, and SiC, with its innate high-voltage, high-frequency and high-temperature characteristics, the sought solution. The Office of Naval Research (ONR) together with the Defense Advanced Research Projects Agency (DARPA) have accordingly devoted an immense effort towards the development of 10 kV SiC MOSFETs and Junction-barrier- Schottky (JBS) diodes, having successfully demonstrated the capabilities of this technology in several applications thus far. Furthering this effort, ONR is presently directing the development of SiCbased PEBB units for next-generation shipboard systems, embodying the future of this concept. This technological evolution, as well as the challenges set forth by SiC-based power conversion, represent the mainstay of this paper.

  • D10: Spurious Turn-On inside a Power Module of Paralleled SiC MOSFETs Zichen Miao, Khai Ngo

  • Abstract: Spurious turn-on occurs in a discrete phase leg comprising two MOSFETs when both dice are turned on simultaneously and generate an observable current spike. Simulation of a module of paralleled dice reveals internal spurious turn-on even in the absence of current spike at the terminals. Power modules with well-behaved terminal waveforms could still have their dice suffering from spurious turn-on (cross-turn-on and self-turn-on). Compared to self-turn-on, which is mainly induced by the common-source inductance, cross-turn-on deserves more attention because of its common appearance and severity for the modules with Kelvin-Source connection, which has been a standard configuration for SiC module manufacturer.

    SPICE model of one commercial module is developed and verified with accuracy higher than the commercial SPICE model. The total switching energy and susceptibility to cross-turn-on for two modules tailored from the commercial layouts are investigated by studying the simulated channel current of each MOSFET die and terminal current of the module in the presence of packages' parasitic impedances. The peak cross-turn-on current of the asymmetrical module is eight times larger than that of the symmetrical module even though the total switching energies of the two modules are similar, which indicates the extra high current stresses on the dice for asymmetrical module.


Session D4: High Density Integration

  • D1: Normalized Design Method for Coils in Series-Series Inductive Power Transfer System Ming Lu, Khai Ngo

  • Abstract: Performances of inductive power transfer (IPT) systems are directly influenced by coils parameters such as self-inductance, mutual inductance, and winding resistance. However, designed values of above mentioned parameters for IPT coils are not repeatable or optimized for different specifications, e.g. operating frequency and load conditions, so coils parameters should be re-designed whenever the specifications are changed. To avoid such redundant re-design process, normalized parameters, including load quality factor, coil quality factor, and normalized operating frequency, are implemented in the design process of IPT coils. The normalized parameters are independent of specifications, so the design results can be used for different specifications. In this paper, a systematic design method is demonstrated for normalized parameters of coils in series-series IPT system. Desired voltage gain, soft-switching of converter switches, and required coil efficiency are all achieved following this normalized design method. The designed planar coils with 100 mm air gap are simulated in finite-element simulation and built for experiment. A 3.3 kW IPT system is constructed and the design is verified experimentally.

  • D2: Conducted EMI Analysis and Filter Design for MHz Active Clamp Flyback Front-End Converter Xiucheng Huang, Junjie Feng, Fred C. Lee, Qiang Li, Yuchen Yang

  • Abstract: High frequency is the major catalyst for size reduction in the advancement of power conversion technology. It is essential to understand the EMI characteristic of high frequency converter since the EMI filter typically occupies one third of total system volume. This paper presents an insight view of CM/DM noise transformation in Flyback converter for low power adapter applications. The so-called mixed-mode noise is DM noise transformed from CM noise due to unbalanced impedance when the diode-bridge is off. The transformer shielding technique can effectively reduce the CM noise, and therefore it can significantly reduce the magnitude of CM transformed noise. A 65W (19V/3.3A) prototype of active clamp flyback front-end converter operating around 1MHz with GaN devices is developed to verify the analysis. A single stage EMI filter is designed accordingly with much smaller size compared with industry practice.

  • D3: Additive Manufacturing of Magnetic Components for Power Electronics Integration Yi Yan, Khai Ngo, Guo-Quan Lu

  • Abstract: In an effort to simplify power electronics integration, we explored an additive manufacturing (AM) process, or commonly known as three-dimensional (3D) printing for fabricating magnetic components. A commercial fused-deposition-model (FDM) 3D printer was modified to extrude pastes of powder materials into 3D structures. We formulated a low-temperature curable Poly-Mag paste, which is a mixture of magnetic powder and a polymer, as a feed material for printing the magnetic core and used a commercial nanosilver paste for printing the winding. After the structure was printed, it was cured at 250C for an hour without any external pressure to form the magnetic component. The electrical resistivity of the printed winding was about three times higher than that of bulk silver. This is because of the low curing temperature resulted in a lower density than the bulk. The relative permeability dispersion of the printed core had a bandwidth up to 10 MHz with a static relative permeability of about 10. Both the winding and core magnetic properties will be improved by adjusting the feed paste formulations and their flow characteristics and fine-tuning the printer parameters, such as motor speeds, extrusion rate, and nozzle sizes.

  • D4: Magnetic Characterization Technique and Materials Comparison for Very High Frequency IVR Dongbin Hou, Fred C Lee, Qiang Li

  • Abstract: To efficiently power multi-core processors in today's computing devices, integrated voltage regulator (IVR) shows significant energy saving ability by dynamic voltage and frequency scaling. One key aspect in developing IVR is to design power inductors with small size and small loss at very high frequency. However, the challenge in very high frequency magnetic characterization is a major obstacle to accurately design and test the IVR inductors. In this work, the magnetic characterization technique at tens of MHz is investigated, and the issue and solution in permeability and loss measurement are demonstrated. The LTCC and NEC flake materials are characterized and compared at very high frequency for IVR inductor design.

  • D5: Point-of-Load Inductor with High Swinging and Low Loss at Light Load Ting Ge, Khai Ngo, Jim Moss

  • Abstract: Point-of-load converter at light load has low efficiency owing to the "fixed losses" such as core loss and ac winding loss. This paper focuses on two-dimensional (2D) gapping of a ferrite core to shape inductance versus load current to reduce inductor loss at light load. Since the maximum inductance of conventional stepped gap is limited by the cross-sectional area of the thin gap, a 2D gap is formed by joining two orthogonal gaps to gain flexibility. Higher inductance is achieved at light load compared with uniform-gap and stepped-gap geometries having the same volume and dc resistance. Ac resistance is reduced at light load thanks to a magnetic path that steers ac flux away from the winding. Two C-cores with 2D gap were fabricated and tested on a buck converter with 50% reduced total inductor loss at 10% load current.

  • D6: Inductor Coupling and Integration for 6.6kW On Board Battery Charger Yuchen Yang, Zhengyang Liu, Fred C. Lee, Qiang Li

  • Abstract: Coupled inductor has been widely adopted in VR applications for many years because of its benefits such as reducing current ripple or improving transient performance. Previously, the negative coupled inductor has been applied to interleaved MHz totem-pole CRM PFC converter for server power supply. In this paper, the positive coupled inductor concept is applied to interleaved totem-pole CRM PFC converter for 6.6kW on board battery charger. The difference between negative coupling and positive coupling will be discussed. The benefit of positive coupling for battery charger will be presented, such reducing switching frequency range and reducing input DM noise. Hence the positive coupled inductor can improve the performance of PFC converter. In addition, balance technique is applied to help minimize CM noise. Previously, balance technique has been developed for interleaved boost PFC converter with independent inductors. This presentation will introduce how to achieve balance with coupled inductor. Last but not least, the inductor will be integrated into PCB winding with a little sacrifice on loss. With the inductor integration, the converter can avoid labor intensive production and achieve fully automatic manufacturing.

  • D7: Passive Component Loss Minimization for Interleaved DC-DC Boost Converters in Electric Vehicle Applications Xuning Zhang, Rolando Burgos, Dushan Boroyevich

  • Abstract: This paper presents the inductor loss minimization for interleaved boost converters in electric vehicle applications. Equivalent circuits are presented to analyze the steady state working condition of the inductors in interleaving topology with and without coupled inductors. With the proposed equivalent circuits, inductor working condition can be predicted for both boost inductors and coupled inductors. Based on the predicted inductor working conditions, inductor loss modeling is presented in details considering detailed DC and AC winding loss modeling and core loss calculation with improved generalized Steinmetz equation. Passive component loss minimization method is presented to explore the optimized coupled inductance for total inductor loss minimization. Experimental verification is conducted based on a 1 kW interleaved dc-dc boost converter.

  • D8: High Frequency PCB Winding Transformer Design for On Board Battery Charger Bin Li, Qiang Li, Fred C. Lee

  • Abstract: CLLC bi-directional resonant converter is able to achieve soft switching for all devices, which makes it a great candidate for high frequency DC-DC converter. A variable DC-link voltage is introduced so that the switching frequency can be fixed around resonant frequency and therefore the converter will always work at its optimized point. In order to regulate charging current, a leakage integration method is proposed using an EI core structure with PCB winding transformer. By using center post as leakage path, the leakage inductance and magnetizing inductance can be adjusted by changing the air gap of outer post and center post. Compared with discrete litz-wire inductor with PCB winding transformer, the automatic manufacture capability of the integrated transformer is much better, and the loss increase is negligible. Detailed design procedure is provided including leakage inductance selection, core loss density selection and so on so that the lowest loss can be achieved within the smallest footprint.

  • D9: Differential-Mode EMI Emission Prediction of SiC-Based Power Converters Using a Mixed-Mode Unterminated Behavioral Model Bingyao Sun, Rolando Burgos, Xuning Zhang, Dushan Boroyevich

  • Abstract: With the high electromagnetic interference (EMI) noise generated by fast-switching-speed devices, it is crucial to learn about EMI noise generation and propagation in the systems and design effective EMI filters. EMI behavioral models have been verified as an effective tool to predict common-mode (CM) and differential-mode (DM) EMI noise and aid in EMI filter design. However, these models cannot predict the effect of the cross-coupled DM and CM noise, which is more likely to be present when operating at a high switching frequency. Accordingly, this paper explains the cross-coupled effect that noise generation and propagation have in an inverter system. A mix-mode unterminated behavioral model is proposed to capture the DM noise at the input DC terminals considering the mixed CM effect. The model accuracy is verified to 30 MHz in experiments carried out on a three-phase SiC MOSFET inverter.

  • D10: Gate Driver with Overshoot Regulation and Active Snubbing Chien-An Chen, Khai Ngo

  • Abstract: Voltage overshoot is regulated by controlling the gate driver. During device turn-off stage, voltage ringing occurs on switching devices due to the resonance between parasitic elements. Improvements can be achieved by slowing down the gate driving speed or by absorbing the energy on passive components. Yet switching loss will increase in these methods. Controls of gate drivers can reduce voltage with less power loss, but the clamping voltage varies with different parameters or operating conditions in the applied circuit. This paper presents a gate driver with overshoot regulation and active snubbing (ORAS). Minimum energy is used to achieve voltage clamping within expected level. It regulates overshoot with controlled gate-signal in the beginning of ringing, so voltage can be clamped by least energy loss. To limit the maximum voltage, a closed-loop controller is used to clamp the voltage under certain level by sensing the peak voltage. Through simulation, ORAS is proven to reduce voltage overshoot from 28 V to 17 V, and regulate Vdsmax within 1 V error during load/ line transient. Compared with other methods in the same level of voltage-clamping, ORAS consumes only half of the energy by using snubber and 1/6 of energy by increasing gate resistor. With precisely overvoltage regulating and minimum energy consuming, a gate driver with overshoot regulator is built. A mathematic model of ORAS is verified and can be applied in compensator design.

  • D11: Modeling of Plate-Core Inductors and Coupled Inductors Han Cui, Khai D. T. Ngo

  • Abstract: Planar magnetics are widely used in bias power supplies for the benefits of low profile and their compatibility with printed-circuit boards (PCB). The inductors and coupled inductors with winding layers sandwiched between two core plates are studied in this paper in order to model self-inductance, winding loss, core loss, and leakage inductance. The most challenging task for the plate-core inductor is to model the magnetic field with finite core dimensions, very non-uniform flux pattern, and large fringing flux. Motivated by the finite-element analysis (FEA) plot of flux lines, proportional-reluctance, equal-flux (PREF) model is developed to find the magnetic field by dividing the reluctance into several tubes that carry same amount of flux. The methodology to construct the tubes is given and the magnetic field versus space is found from the ratio of the flux over the cross-sectional areas. The inductance, ac winding loss, core loss, and leakage inductance are derived based on the modeling result of the field. Prototypes made of flexible circuit for single-winding inductors are tested with different layouts to verify the model. The model will be applied to the coupled inductors and verified by coupled-inductor prototypes.

  • D12: EMI Filter Design of DC-Fed Motor-Drives using Behavioral EMI Models Hemant Bishnoi, Paolo Mattavelli, Rolando P. Burgos, Dushan Boroyevich

  • Abstract: Behavioral EMI models for the prediction of common-mode (CM) and differential-mode (DM) noise based on Thevenin equivalents were developed earlier for a dc-fed motor-drive system. It was shown that beyond the switching frequency of the drive, the CM noise model behaved like a two-port linear network and could predict changes in the input-side EMI due to any changes in the load-side parameters or vice versa. This CM model was then complemented with linear one-port DM behavioral models to predict the total noise at both the input and the output side of the motor-drive up to 30 MHz.

    The work presented here proposes a method to use these behavioral EMI models for simultaneous design and optimization of EMI filters on both the input and the output side of the motor-drive system, such that the total size of all filters is minimum. All filter designs are experimentally validated against the DO-160 standards for aerospace applications up to 30 MHz. The problems limiting the accuracy of the proposed method are clearly discussed.

  • D13: Comparison and Selection of Magnetic Materials for Coupled Inductor Used in Interleaved Three-level Multi-phase DC-DC Converters Mingkai Mu, Fred C. Lee

  • Abstract: The coupled inductor can reduce the large inductor current ripple in the interleaved multiphase three-level converter, while keeping the benefits of interleaving. The design of coupled inductor is different from conventional two-level converters. This paper analyzes the flux in a new structure of the coupled inductor for three-level converter, and proposes a detailed design method to select proper core material, like amorphous or nano-crystalline, to achieve the minimum volume or weight. The choice isn't only related to frequency, but also the converter's voltage and current specifications. Amorphous and nano-crystalline materials are compared, and the material selection guideline is given at the end of this paper.

  • D14: Study on Three-level DC/DC Converter with Coupled Inductors Ruiyang Qin, Fred C. Lee

  • Abstract: This paper investigates on multi-phase three-level DC/DC converter for high power high voltage renewable energy systems. With interleaving modulation and coupled inductors, both inductor current ripple and output current ripple are largely reduced compared with traditional non-interleaving, single inductor case. To further improve power density, coupled inductors are further integrated. The small-signal model of converter with integrated coupled inductors is given and compared with conventional buck converter to show their similarity. Also, magnetic design is discussed based on the magnetic circuit analysis and different magnetic material selection.

  • D15: Thermo-Mechanical Reliability of High-Temperature Power Modules with Metal-Ceramic Substrates and Sintered Silver Joints Shan Gao, Seiya Yuki, Hideyo Osanai, Weizhen Sun, Khai Ngo, Guo-Quan Lu

  • Abstract: Demands for higher power density and reliability on power electronics systems are driving the need for development of high-temperature packaging solutions. Existing power module packaging technologies that rely on lead-tin or lead-free die-attach solders and alumina direct-bond-copper (DBC) insulated substrates are limited to 125C junction temperature for reliable module operation. This is because of low-melting temperatures of the solders and low alumina toughness, respectively. Recently, die-attach by silver sintering or the low-temperature joining technique (LTJT), has been shown to significantly improve chip-bonding reliability at higher junction temperatures. Concurrently, direct-bond-aluminum (DBA) substrates with aluminum nitride (AlN) ceramic and DBC substrates using high-toughness silicon nitride (Si3N4) ceramic are shown to be significantly more reliable than alumina DBC substrates, especially over large temperature swings. However, it has been reported that the surface roughness of these substrates under temperature-cycling of 300C swing increased drastically, which may reduce the reliability of the sintered silver joints since the sintered bond-line thickness is typically in the range of 10 to 20 microns. The objective of this study is to characterize effects of the surface roughening on the thermo-mechanical reliability of sintered-silver joints on DBA and on Si3N4 DBC for high-temperature packaging of wide bandgap power semiconductor devices or modules.

  • D16: Effect of Heating Rate on Bonding Strength of Pressure-Free Sintered Nanosilver Joint Kewei Xiao, Khai D.T. Ngo, Guo-Quan Lu

  • Abstract: Chip-bonding by sintering silver particles (micron-scale or nanometer-scale) is widely believed to replace soldering for manufacturing high-performance power semiconductor devices and modules because sintered silver joints are better for heat dissipation and more reliable in temperature-cycling and power-cycling tests than soldered joints. Common raw materials used for the silver sintering process are in the form of paste consisting of silver particles mixed in an organic system of binders, surfactants, and solvents. In our recent studies, we developed a mathematical model based on diffusion of solvent molecules and viscous-flow mechanics of a silver paste to show that drying of the paste in the bonding process is a critical step in determining the bondline microstructural and mechanical quality. Our modeling results showed that stresses and strains generated in the shrinking silver paste were responsible for observed delamination and cracking in the sintered bond-line. In this study, we extended the modeling analysis to investigate effect of heating rate on the bond-line quality. A numerical simulation algorithm of the model was developed to determine the time-dependent physical properties of the silver paste as the material being dried at different heating rates. The simulation results showed a strong dependence of the relative density of the sintered bond-line on heating rate. By lowering the heating rate, the relative density of the sintered silver could be increased. Higher sintered density would mean stronger bonding strength, and this was verified by our experimental data. The findings of this study can be used to optimize the manufacturing process that uses sintering of silver paste for bonding power semiconductor chips.

  • D17: A New Package of High-Voltage Cascode Gallium Nitride Device for Megahertz Operation Wenli Zhang, Xiucheng Huang, Zhengyang Liu, Fred C. Lee, Shuojie She, Weijing Du, Qiang Li

  • Abstract: Lateral gallium nitride (GaN)-based high-electron-mobility transistor (HEMT) power devices have high current density, high switching speed, and low on-resistance in comparison to the established silicon (Si)-based semiconductor devices. These superior characteristics make GaN HEMTs ideal for high-frequency, high-efficiency power conversion. Using efficient GaN HEMT devices switched at high frequency in power electronic systems could lead to an increase in power density as well as a reduction in the weight, size, and cost of the system. However, conventional packaging configurations often compromise the benefits provided by high-performance GaN HEMT devices, for example, by increasing the parasitic inductance and resistance in the current loops of the device. This undesirable package-induced performance degradation is prominent in the cascode GaN device, where the combination of a high-voltage depletion-mode GaN semiconductor and low-voltage enhancement-mode Si semiconductor is needed. In this work, a new package is introduced for high-voltage cascode GaN devices and is successfully demonstrated to make the device more suitable for megahertz (MHz) operation. This packaging prototype for cascode GaN devices is fabricated in a power quad flat no-lead (PQFN) format with the new features of a stack-die structure, embedded external capacitor, and flip-chip configuration. The parasitic ringing in hard-switching turn-off and switching losses in soft-switching transitions are both effectively reduced for this newly packaged device compared with a traditional package using the same GaN and Si devices. Improved thermal dissipation capability is also realized using this new package for better reliability.

  • D18: High Density Integration of High Frequency High Current Point-of-Load (POL) Modules with Planar Inductors Wenli Zhang, Yipeng Su, Mingkai Mu, David J. Gilham, Qiang Li, Fred C. Lee

  • Abstract: Planar inductors made by mixed laminates of low-temperature sintered Ni-Cu-Zn ferrite tapes and metal-flake composite materials are used for high density integration of point-of-load (POL) modules. Incremental permeability and core loss density were characterized on toroidal samples under high dc bias to demonstrate that both materials are suitable for application in high frequency high current POL converters. In order to realize a high power density POL module, a multilayer ferrite inductor laminated with alternating layers of ESL 40010 and ESL 40012 in a 1:1 ratio has been fabricated and integrated with the active layer. Meanwhile, standard printed circuit board (PCB) processing has been adopted for the POL integration with a PCB-embedded inductor using NEC-TOKIN's metal-flake composite materials. These developed 3-D integration approaches can be used to reduce the footprint and increase the power density for POL converters. It has been demonstrated that the power efficiency of both POL modules with integrated planar inductors can achieve above 87% at an operating frequency of 2 MHz and an output current of 15 A. Additionally, no obvious efficiency degradation was observed on the integrated POL modules after a certain number of thermal cycling from -40C to 150C.

  • D19: A New Package of High-Voltage Cascode Gallium Nitride Device for High-Frequency Applications Fred C. Lee, Wenli Zhang, Xiucheng Huang, Zhengyang Liu, Weijing Du, Qiang Li

  • Abstract: Lateral gallium nitride (GaN)-based high-electron-mobility transistor (HEMT) power devices have high current density, high switching speed, and low on-resistance in comparison to the established silicon (Si)-based semiconductor devices. Using efficient GaN HEMT devices switched at high frequency in power electronic systems could lead to an increase in power density as well as a reduction in the weight, size, and cost of the system. However, conventional packaging configurations often compromise the benefits provided by high-performance GaN HEMT devices. This undesirable package-induced performance degradation is prominent in the cascode GaN device, where the combination of a high-voltage depletion mode GaN device and low-voltage enhancement-mode Si device is needed. In this work, a new package is introduced for high-voltage cascode GaN devices and is successfully demonstrated to make the device more suitable for megahertz (MHz) operation. This packaging prototype for cascode GaN devices is fabricated in a power quad flat no-lead (PQFN) format with the new features of a stack-die structure, embedded external capacitor, and flip-chip configuration. The parasitic ringing in hard-switching turn-off and switching losses in soft-switching transitions are both effectively reduced for this newly packaged device compared with a traditional package using the same GaN and Si devices. Improved thermal dissipation capability is also realized using this new package for better reliability.

  • D20: Survey of High-Temperature Polymeric Encapsulants for Power Electronics Packaging Yiying Yao, Guo-Quan Lu, Dushan Boroyevich, Khai D.T. Ngo

  • Abstract: Semiconductor encapsulation is crucial to electronic packaging because it provides protection against mechanical stress, electrical breakdown, chemical erosions, radiations, and so on. Conventional encapsulants are only applicable below 150C. However, with increasing demand for high-density and high-temperature packaging, encapsulants that are functional at or above 250C are required. In this paper, five types of encapsulants, including conformal coatings, underfills, molding compounds, potting compounds, and glob tops, are surveyed. First, recommended properties and selection criteria of each type of encapsulant are listed. Second, standard test methods for several crucial properties, including glass-transition temperature (Tg), coefficient of thermal expansion (CTE), dielectric strength, and so on are reviewed. Afterward, commercial products with highoperation temperature are surveyed. However, the results of the survey reveal a lack of high-temperature encapsulants. Therefore, this paper reviews recent progress in achieving encapsulants with both high-temperature capability and satisfactory properties. Material compositions other than epoxy, such as polyimide (PI), bismaleimide (BMI), and cyanate ester (CE), are potential encapsulants for high-temperature (250C) operation, although their CTE needs to be tailored to limit internal stress. Fillers are reported to be efficient in reducing the CTE. In addition, fillers may also have a beneficial impact on the thermal stability of silicone-based encapsulants, whose high-temperature capability is limited by their thermal instability.

  • D21: Thermal Analysis and Improvement of Cascode GaN Device Package for Totem-Pole Bridgeless PFC Rectifier Shuojie She, Wenli Zhang, Zhengyang Liu, Fred C Lee, Xiucheng Huang, Weijing Du, Qiang Li

  • Abstract: The totem-pole bridgeless power factor correction (PFC) rectifier has a simpler topology and higher efficiency than other boost-type bridgeless PFC rectifiers. Its promising performance is enabled by using high-voltage gallium nitride (GaN) high-electron-mobility transistors, which have considerably better figures of merit (e.g., lower reverse recovery charges and less switching losses) than the state-of-the-art silicon metal-oxide-semiconductor field-effect transistors. Cascode GaN devices in traditional packages, i.e., the TO-220 and power quad flat no-lead, are used in the totem-pole PFC boost rectifier. But the parasitic inductances induced by the traditional packages not only significantly deteriorate the switching characteristics of the discrete GaN device but also adversely affect the performance of the built PFC rectifier. A new stack-die packaging structure with an embedded capacitor has been introduced and proven to be efficient in reducing parasitic ringing at the turn-off transition and achieving true zero-voltage-switching turn-on. However, the thermal dissipation capability of the device packaged in this configuration becomes a limitation on further pushing the operating frequency and the output current level for high-efficiency power conversion. This paper focuses on the thermal analysis of the cascode GaN devices in different packages and the GaN-based multichip module used in a two-phase totem-pole bridgeless PFC boost rectifier. A series of thermal models are built based on the actual structures and materials of the packaged devices to evaluate their thermal performance. Finite element analysis (FEA) simulation results of the cascode GaN device in a flip-chip format demonstrate the possibility of increasing the device switching speed while maintaining the peak temperature of the device below 125C. Thermal analysis of the GaN-based power module in a very similar structure is also conducted using the FEA method. Experimental data measured using the fabricated devices and modules validate the simulation results. The developed new package in a flip-chip configuration enhances the thermal dissipation capability of the cascode GaN device in the stack-die format. The GaN-based power module built using the same packaging structure also demonstrates desirable thermal performance.

  • D22: A Gallium Nitride-Based Power Module for Totem-Pole Bridgeless Power Factor Correction Rectifier Wenli Zhang, Zhengyang Liu, Fred Lee, Shuojie She, Xiucheng Huang, Qiang Li

  • Abstract: The totem-pole bridgeless power factor correction (PFC) rectifier has recently gained popularity for ac-dc power conversion. The emerging gallium nitride (GaN) high-electron-mobility transistor (HEMT), having a small body diode reverse recovery effect and low switching loss, is a promising device for use in the totem-pole approach. The design, fabrication, and thermal analysis of a GaN-based full-bridge multi-chip module (MCM) for totem-pole bridgeless PFC rectifier are introduced in this work. Four cascode GaN devices using the same pair of high-voltage GaN HEMT and low-voltage silicon (Si) power metal-oxide-semiconductor field-effect transistor (MOSFET) chips, as used in the discrete TO-220 package, were integrated onto one aluminum nitride direct-bonded-copper (AlN-DBC) substrate in a newly designed MCM. This integrated power module achieves the same function as four discrete devices mounted on the circuit board. In this module design, the Si and GaN bare die were arranged in a stack-die format for each cascode device to eliminate the critical common source inductance, and thus to reduce parasitic ringing at turn-off transients. In addition, an extra capacitor was added in parallel with the drain-source terminals of the Si MOSFET in each cascode GaN device to compensate for the mismatched junction capacitance between the Si MOSFET and GaN HEMT, which could accomplish the internal zero-voltage switching of the GaN device and reduce its turn-on loss. The AlN-DBC substrate and the flip-chip format were also applied in the module design. This GaN-based MCM shows an improved heat dissipation capability based on the thermal analysis and comparison with the discrete GaN device. The totem-pole bridgeless PFC rectifier built using this integrated power module is expected to have a peak efficiency of higher than 99% with a projected power density greater than 400 W/in3.


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